Change in coreboot[master]: soc/intel/common/fast_spi: support caching `ext_bios` in ramstage

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62837 )

Change subject: soc/intel/common/fast_spi: support caching `ext_bios` in ramstage
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soc/intel/common/fast_spi: support caching `ext_bios` in ramstage

This patch provides a way to cache ext_bios region for all stage.

TEST=Able to see ext_bios region in MTRR snapshot when cached.

Signed-off-by: Subrata Banik 
Change-Id: I87139a9ed7eb9ed43164a5199aa436dd1219145c
---
M src/soc/intel/common/block/fast_spi/fast_spi.c
1 file changed, 8 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/62837/1

diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 0e01231..7be71a2 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -245,10 +245,14 @@
    if (!fast_spi_ext_bios_cache_range(&ext_bios_base, &ext_bios_size))
    	return;

-	int mtrr = get_free_var_mtrr();
-	if (mtrr == -1)
-		return;
-	set_var_mtrr(mtrr, ext_bios_base, ext_bios_size, type);
+	if (ENV_PAYLOAD_LOADER) {
+		mtrr_use_temp_range(ext_bios_base, ext_bios_size, type);
+	} else {
+		int mtrr = get_free_var_mtrr();
+		if (mtrr == -1)
+			return;
+		set_var_mtrr(mtrr, ext_bios_base, ext_bios_size, type);
+	}
 }

void fast_spi_cache_ext_bios_postcar(struct postcar_frame *pcf)