Change in ...coreboot[master]: soc/intel/cannonlake: Clear PMCON status bits

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31902 )

Change subject: soc/intel/cannonlake: Clear PMCON status bits
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Patch Set 4:

(1 comment)

https://review.coreboot.org/#/c/31902/3/src/soc/intel/cannonlake/pmutil.c 
File src/soc/intel/cannonlake/pmutil.c:

https://review.coreboot.org/#/c/31902/3/src/soc/intel/cannonlake/pmutil.c@14... 
PS3, Line 146: pmc_clear_suspwrflr
> makes sense, If FSP is relying on these values we have to make we clear these after FSP is done initialization.

Does FSP rely on these values? If yes, what for? Ideally I was thinking of doing this in pmc_init instead of pch_finalize.
> I think FSP will clear the PWR_FLR status itself anyway right? In PchOnPciEnumCompleteCommon function

I don't think we should rely on FSP doing this.