Attention is currently required from: Jakub Czapiga.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63643 )
Change subject: test/lib: Add non-existent DIMMs test case in spd_cache-test
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Patch Set 1:
(2 comments)
File tests/lib/spd_cache-test.c:
https://review.coreboot.org/c/coreboot/+/63643/comment/582a06b2_b85ee52c
PS1, Line 73: 0
I would like to fix this, since in ROM default value is 0xff, you you never access that. In a follow up CL.
https://review.coreboot.org/c/coreboot/+/63643/comment/38a05fcd_f86cdb5b
PS1, Line 84: 0
same above.
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