Change in coreboot[master]: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47057 )

Change subject: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order
......................................................................

soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order

Signed-off-by: Subrata Banik 
Change-Id: I7adf430e6ce5f78f68a0c73af841fbdc62bb5dc9
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/tigerlake/Kconfig
5 files changed, 5 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/47057/1

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index ade2fc1..b10d88c 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -40,6 +40,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CPU
    select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
@@ -53,7 +54,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS
    select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index f833178..89da0be 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -40,6 +40,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CPU
    select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
@@ -54,7 +55,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS
    select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index e1d474e..67bbcb2 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -41,6 +41,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CPU
    select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 9ee119f..201afec 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -39,6 +39,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CPU
    select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
@@ -53,7 +54,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS
    select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 5967a69..9aa40ed 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -40,6 +40,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CPU
    select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
@@ -56,7 +57,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47057 )

Change subject: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order
......................................................................

Patch Set 2: Code-Review+2

[Subrata Banik (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Angel Pons, Tim Wawrzynczak, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47057

to look at the new patch set (#3).

Change subject: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order
......................................................................

soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order

Signed-off-by: Subrata Banik 
Change-Id: I7adf430e6ce5f78f68a0c73af841fbdc62bb5dc9
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/tigerlake/Kconfig
5 files changed, 5 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/47057/3

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47057 )

Change subject: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order
......................................................................

Patch Set 3:

Angel, I have missed ICL in last patchset. fixed it now. sorry for that.

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47057 )

Change subject: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order
......................................................................

Patch Set 3: Code-Review+2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47057 )

Change subject: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order
......................................................................

Patch Set 3:
> Patch Set 3:
>
> Angel, I have missed ICL in last patchset. fixed it now. sorry for that.

No problem!

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47057 )

Change subject: soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order
......................................................................

soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order

Signed-off-by: Subrata Banik 
Change-Id: I7adf430e6ce5f78f68a0c73af841fbdc62bb5dc9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47057
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/tigerlake/Kconfig
5 files changed, 5 insertions(+), 5 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index ade2fc1..b10d88c 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -40,6 +40,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CPU
    select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
@@ -53,7 +54,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS
    select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index f833178..89da0be 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -40,6 +40,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CPU
    select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
@@ -54,7 +55,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS
    select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 23b9ba2..52e9a74 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -41,6 +41,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CNVI
    select SOC_INTEL_COMMON_BLOCK_CPU
@@ -55,7 +56,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS
    select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 00153fa..e84add0 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -39,6 +39,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CNVI
    select SOC_INTEL_COMMON_BLOCK_CPU
@@ -54,7 +55,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS
    select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 492d6fd4..ed35bd6 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -40,6 +40,7 @@
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
    select SOC_INTEL_COMMON_BLOCK_ACPI
+	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
    select SOC_INTEL_COMMON_BLOCK_CNVI
    select SOC_INTEL_COMMON_BLOCK_CPU
@@ -57,7 +58,6 @@
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_BASE
    select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_BLOCK_CAR
    select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
    select SSE2
    select SUPPORT_CPU_UCODE_IN_CBFS