Change in coreboot[master]: arch/riscv: Avoid config string-based query_mem

[Jonathan Neuschäfer (Code Review)]

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/21690

Change subject: arch/riscv: Avoid config string-based query_mem
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arch/riscv: Avoid config string-based query_mem

RISC-V is moving towards OpenFirmware-derived device trees, and the old
functions to read the config string don't work anymore. Use dummy values
for the memory base and size until we can query the device tree.

This lets coreboot run until somewhere in ramstage.

Change-Id: Ice13feae4da2085ee56bac4ac2864268da18d8fe
Signed-off-by: Jonathan Neuschäfer 
---
M src/mainboard/emulation/spike-riscv/romstage.c
M src/soc/ucb/riscv/cbmem.c
2 files changed, 8 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/21690/1

diff --git a/src/mainboard/emulation/spike-riscv/romstage.c b/src/mainboard/emulation/spike-riscv/romstage.c
index dccdf22..372c7b2 100644
--- a/src/mainboard/emulation/spike-riscv/romstage.c
+++ b/src/mainboard/emulation/spike-riscv/romstage.c
@@ -19,11 +19,10 @@

void main(void)
 {
-	uintptr_t base;
-	size_t size;
-
    console_init();
-	query_mem(configstring(), &base, &size);
-	printk(BIOS_SPEW, "0x%zx bytes of memory at 0x%llx\n", size, base);
+
+	//query_mem(configstring(), &base, &size);
+	//printk(BIOS_SPEW, "0x%zx bytes of memory at 0x%llx\n", size, base);
+
    run_ramstage();
 }
diff --git a/src/soc/ucb/riscv/cbmem.c b/src/soc/ucb/riscv/cbmem.c
index 44ffa26..f8f4098 100644
--- a/src/soc/ucb/riscv/cbmem.c
+++ b/src/soc/ucb/riscv/cbmem.c
@@ -19,7 +19,10 @@
    uintptr_t base;
    size_t size;

-	query_mem(configstring(), &base, &size);
+	/* Use dummy values until we can query the memory size again */
+	//query_mem(configstring(), &base, &size);
+	base = 0x80000000;
+	size = 128 * MiB;

return (void *)(base + size);
 }