Ronald G. Minnich (rminnich@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4272
-gerrit
commit 98a25d19ebe5f80a255b77f3bb57cc137e9382cc Author: Ronald G. Minnich rminnich@google.com Date: Mon Nov 25 10:02:51 2013 -0800
armv8: add support for armv8 cpu
This is an emulation cpu.
Lots of stuff missing, clearly, but I want to get the basic outline right.
Change-Id: I31b912dc7d2f40f43490cf5c1ea836fcdfd48f2c Signed-off-by: Ronald G. Minnich rminnich@google.com --- Makefile | 1 + src/Kconfig | 8 ++++++++ src/cpu/Kconfig | 10 ++++++++-- src/cpu/armltd/Kconfig | 9 +++++++++ src/cpu/armltd/Makefile.inc | 1 + src/cpu/armltd/armv8/Kconfig | 5 +++++ src/cpu/armltd/armv8/Makefile.inc | 3 +++ src/cpu/armltd/armv8/bootblock.c | 17 ++++++++++++++++ src/cpu/armltd/armv8/cache.c | 42 +++++++++++++++++++++++++++++++++++++++ 9 files changed, 94 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index b709d14..edf1ca3 100644 --- a/Makefile +++ b/Makefile @@ -113,6 +113,7 @@ else
include $(HAVE_DOTCONFIG)
+ARCHDIR-$(CONFIG_ARCH_AARCH64) := aarch64 ARCHDIR-$(CONFIG_ARCH_ARMV7) := armv7 ARCHDIR-$(CONFIG_ARCH_X86) := x86
diff --git a/src/Kconfig b/src/Kconfig index 1c80b8c..a8ae6ec 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -227,6 +227,10 @@ config ARCH_ARMV7 bool default n
+config ARCH_AARCH64 + bool + default n + # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. if ARCH_X86 @@ -237,6 +241,10 @@ if ARCH_ARMV7 source src/arch/armv7/Kconfig endif
+if ARCH_AARCH64 +source src/arch/aarch64/Kconfig +endif + config HAVE_ARCH_MEMSET bool default n diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index e48fe87..a88fd87 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -1,13 +1,19 @@ # Warning: This file is included whether or not the if is here. # The if controls how the evaluation occurs. # (See also src/Kconfig) -if ARCH_ARMV7 +
source src/cpu/armltd/Kconfig + +# I'm not certain these should be here or in +# src/cpu/armltd/Kconfig. + +if ARCH_ARMV7 + source src/cpu/samsung/Kconfig source src/cpu/ti/Kconfig
-endif # ARCH_ARM +endif # ARCH_ARMV7
if ARCH_X86
diff --git a/src/cpu/armltd/Kconfig b/src/cpu/armltd/Kconfig index b1f4c2e..a292b4c 100644 --- a/src/cpu/armltd/Kconfig +++ b/src/cpu/armltd/Kconfig @@ -6,3 +6,12 @@ config CPU_ARMLTD_CORTEX_A9 if CPU_ARMLTD_CORTEX_A9 source src/cpu/armltd/cortex-a9/Kconfig endif + +config CPU_ARMLTD_ARMV8 + depends on ARCH_AARCH64 + bool + default n + +if CPU_ARMLTD_ARMV8 +source src/cpu/armltd/armv8/Kconfig +endif diff --git a/src/cpu/armltd/Makefile.inc b/src/cpu/armltd/Makefile.inc index 014742f..87bd738 100644 --- a/src/cpu/armltd/Makefile.inc +++ b/src/cpu/armltd/Makefile.inc @@ -1 +1,2 @@ subdirs-$(CONFIG_CPU_ARMLTD_CORTEX_A9) += cortex-a9 +subdirs-$(CONFIG_CPU_ARMLTD_CORTEX_A9) += armv8 diff --git a/src/cpu/armltd/armv8/Kconfig b/src/cpu/armltd/armv8/Kconfig new file mode 100644 index 0000000..30b8df1 --- /dev/null +++ b/src/cpu/armltd/armv8/Kconfig @@ -0,0 +1,5 @@ +config BOOTBLOCK_CPU_INIT + string + default "cpu/armltd/armv8/bootblock.c" + help + CPU/SoC-specific bootblock code. diff --git a/src/cpu/armltd/armv8/Makefile.inc b/src/cpu/armltd/armv8/Makefile.inc new file mode 100644 index 0000000..f1a3689 --- /dev/null +++ b/src/cpu/armltd/armv8/Makefile.inc @@ -0,0 +1,3 @@ +ramstage-y += cache.c +romstage-y += cache.c +bootblock-y += cache.c diff --git a/src/cpu/armltd/armv8/bootblock.c b/src/cpu/armltd/armv8/bootblock.c new file mode 100644 index 0000000..8925439 --- /dev/null +++ b/src/cpu/armltd/armv8/bootblock.c @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2013 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +void bootblock_cpu_init(void); +void bootblock_cpu_init(void) +{ +} diff --git a/src/cpu/armltd/armv8/cache.c b/src/cpu/armltd/armv8/cache.c new file mode 100644 index 0000000..dd00faf --- /dev/null +++ b/src/cpu/armltd/armv8/cache.c @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2013 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <aarch64.h> + +/* + * Sets L2 cache related parameters before enabling data cache + */ +void v8_outer_cache_enable(void) +{ +} + +/* stubs so we don't need weak symbols in cache_v8.c */ +void v8_outer_cache_disable(void) +{ +} + +void v8_outer_cache_flush_all(void) +{ +} + +void v8_outer_cache_inval_all(void) +{ +} + +void v8_outer_cache_flush_range(u32 start, u32 end) +{ +} + +void v8_outer_cache_inval_range(u32 start, u32 end) +{ +}
-
Ronald G. Minnich