[L] Change in coreboot[main]: soc/intel/ptl: Add GPE1 defines

[Cliff Huang (Code Review)]

Attention is currently required from: Cliff Huang, Jérémy Compostella, Kapil Porwal, Pranava Y N.

Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84297?usp=email )

Change subject: soc/intel/ptl: Add GPE1 defines
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Patch Set 6:

(1 comment)

File src/soc/intel/pantherlake/include/soc/gpe.h:

https://review.coreboot.org/c/coreboot/+/84297/comment/227e1da4_09dedbd8?usp... :
PS4, Line 30: 146
> Subrata, […]

with block number:

#define GEP1_BIT(blk, n) (GPE_START_NUM + (blk) * 32 + (n))

#define GPE1_CNVI_BT_PME_B0 GPE1_BIT(0, 18) // 146 -> _L92 
...