Change in coreboot[master]: mb/intel/adlrvp: Select ADL_ENABLE_USB4_PCIE_RESOURCES

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51461 )

Change subject: mb/intel/adlrvp: Select ADL_ENABLE_USB4_PCIE_RESOURCES
......................................................................

mb/intel/adlrvp: Select ADL_ENABLE_USB4_PCIE_RESOURCES

This change select the Kconfig to pre-allocate the Intel-recommended bus
and memory resources per-PCIe TBT root port for the adlrvp mainboard.

Signed-off-by: Tim Wawrzynczak 
Change-Id: Ic56ebab02e50a466662a07d122d8f40eaf16b54b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51461
Reviewed-by: Furquan Shaikh 
Reviewed-by: EricR Lai 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/intel/adlrvp/Kconfig
1 file changed, 1 insertion(+), 15 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  EricR Lai: Looks good to me, approved

diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 295b56f..a359d62 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -2,6 +2,7 @@

config BOARD_SPECIFIC_OPTIONS
    def_bool y
+	select ADL_ENABLE_USB4_PCIE_RESOURCES
    select BOARD_ROMSIZE_KB_32768
    select HAVE_ACPI_RESUME
    select HAVE_ACPI_TABLES
@@ -84,21 +85,6 @@
    select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT
 endchoice

-config PCIEXP_HOTPLUG
-	default y
-
-config PCIEXP_HOTPLUG_BUSES
-	int
-	default 42
-
-config PCIEXP_HOTPLUG_MEM
-	hex
-	default 0xc200000  # 194 MiB
-
-config PCIEXP_HOTPLUG_PREFETCH_MEM
-	hex
-	default 0x1c000000 # 448 MiB
-
 config VBOOT
    select VBOOT_LID_SWITCH
    select VBOOT_MOCK_SECDATA