[XS] Change in coreboot[master]: mb/google/guybrush: turn off SD ASPM L1.1/L1.2

[Tim Van Patten (Code Review)]

Attention is currently required from: Felix Held, Jason Nein, Jason Nien, Martin Roth, Matt DeVillier.

Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80237?usp=email )

Change subject: mb/google/guybrush: turn off SD ASPM L1.1/L1.2
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Patch Set 1:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/80237/comment/da7dfc4d_a64ddb0d :
PS1, Line 9: turn off SD ASPM L1.1/L1.2 as w/a for wlan DMA resume failure
Are there any guesses as to why the SD PCIe bus is able to affect the WLAN DMA? How are the two busses affecting each other?

https://review.coreboot.org/c/coreboot/+/80237/comment/0e54ac5c_6fa307f2 :
PS1, Line 12: TEST=test pass over 10k cycles
Please also measure the power impact of this change. You can use the following CL as an example:

https://review.coreboot.org/c/coreboot/+/77963

Patchset:

PS1: 
As noted by the build bot, please use the `main` branch.