Change in coreboot[master]: soc/intel/cannonlake: Drop unnecessary guard for HECI1 disable FSP UPD

[Subrata Banik (Code Review)]

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Sridhar Siricilla, Angel Pons, Nick Vaccaro, Patrick Rudolph, EricR Lai.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61455 )

Change subject: soc/intel/cannonlake: Drop unnecessary guard for HECI1 disable FSP UPD
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Patch Set 3:

(1 comment)

File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/61455/comment/fb7f23f5_80325213 
PS3, Line 589: Heci1
> Writing Heci1 in the code should be ok, but comment should be HECI1!  WDYT?

Don't know about any rule thats support this argument "Writing Heci1 in the code should be ok, but comment should be HECI1!". If you are specific about following the acronym then why not adhere the same all across in my point.

Also, if I just look for your recommendation then also there are ample conflicts. I would prefer to have action that unifies those as well.

src//soc/intel/elkhartlake/romstage/romstage.c:133:	/* initialize Heci interface */
src//soc/intel/cannonlake/chip.h:217:	/* Heci related */
src//soc/intel/cannonlake/romstage/romstage.c:127:	/* initialize Heci interface */
> I can update remaining places wherever applicable.

Sure