Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
Hello build bot (Jenkins), Cliff Huang, Subrata Banik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/59855

to look at the new patch set (#3).

Change subject: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3
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soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3

For additional power savings during RTD3, the PMC can power-gate the
ModPHY lanes that are used by the PCH PCIe root ports. Therefore,
using the previous PCIe RP-type detection functions, implement ModPHY
PG support for the PCH PCIe RPs.

This involves:
1) Adding a mutex so only one power resource accesses the PMC registers
   at a time
2) OperationRegions to access the PMC's PG registers
3) Adding ModPHY PG enable sequence to _OFF
4) Adding ModPHY PG disable sequence to _ON

BUG=b:197983574
TEST=50 S0ix suspend/resume cycles on brya0

Signed-off-by: Tim Wawrzynczak 
Change-Id: I19cb05a74acfa3ded7867b1cac32c161a83b4f7d
---
M src/soc/intel/common/block/pcie/rtd3/rtd3.c
1 file changed, 79 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/59855/3