[S] Change in coreboot[master]: soc/intel/cmd/blk/cse: Implement APIs to access ISH version in CMOS

[Dinesh Gehlot (Code Review)]

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75754?usp=email )

Change subject: soc/intel/cmd/blk/cse: Implement APIs to access ISH version in CMOS
......................................................................

soc/intel/cmd/blk/cse: Implement APIs to access ISH version in CMOS

This patch implements APIs to access ISH version in CMOS. The get API
allows users to retrieve the current ISH version from CMOS memory. The
set API allows users to set the ISH version in CMOS memory.

BUG=b:280722061
Test=Verified the changes nissa board.

Signed-off-by: Dinesh Gehlot 
Change-Id: If6472e5758e67c967158c4384c26142df46d9541
---
M src/soc/intel/common/block/cse/cse_cmos.c
M src/soc/intel/common/block/include/intelblocks/cse_cmos.h
2 files changed, 43 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/75754/1

diff --git a/src/soc/intel/common/block/cse/cse_cmos.c b/src/soc/intel/common/block/cse/cse_cmos.c
index be0455f..66a9659 100644
--- a/src/soc/intel/common/block/cse/cse_cmos.c
+++ b/src/soc/intel/common/block/cse/cse_cmos.c
@@ -23,10 +23,15 @@
 #if CMOS_VSTART_partition_fw % 8 != 0
 #error "The `partition firmware` CMOS entry needs to be byte aligned, check your cmos.layout."
 #endif	// CMOS_VSTART_partition_fw % 8 != 0
-
+#if CONFIG_SOC_INTEL_CACHE_ISH_VERSION_IN_CMOS
+#if CMOS_VLEN_partition_fw != (24 * 8)
+#error "The partition firmware entry needs to be 24 bytes long, check your cmos.layout."
+#endif
+#else
 #if CMOS_VLEN_partition_fw != (16 * 8)
 #error "The partition firmware entry needs to be 16 bytes long, check your cmos.layout."
 #endif
+#endif

# define PARTITION_FW_CMOS_OFFSET (CMOS_VSTART_partition_fw >> 3)

@@ -41,6 +46,9 @@
 struct cse_fw_table {
    uint32_t signature;
    struct fw_version cse_version;
+#if CONFIG_SOC_INTEL_CACHE_ISH_VERSION_IN_CMOS
+	struct fw_version ish_version;
+#endif
    uint16_t checksum;
 } __packed;

@@ -122,3 +130,30 @@
    memcpy(&version.cse_version, cse_version, sizeof(struct fw_version));
    write_cmos_partition_version(&version);
 }
+
+#if CONFIG_SOC_INTEL_CACHE_ISH_VERSION_IN_CMOS
+/* API that allows users to read ISH version stored in CMOS memory. */
+void get_cmos_ish_version(struct fw_version  *ish_version)
+{
+	struct cse_fw_table version;
+	if (read_cmos_partition_version(&version)) {
+		/* CMOS failed to read the ISH version. Possibly CMOS area has corrupted. */
+		printk(BIOS_WARNING, "CMOS fw version corrupted, initiating memory re-init\n");
+		init_cmos_partition_version(&version);
+	}
+	memcpy(ish_version, &version.ish_version, sizeof(struct fw_version));
+}
+
+/* API that allows users to update ISH version stored in CMOS memory. */
+void set_cmos_ish_version(const struct fw_version *ish_version)
+{
+	struct cse_fw_table version;
+	if (read_cmos_partition_version(&version)) {
+		/* CMOS failed to read the ISH version. Possibly CMOS area has corrupted. */
+		printk(BIOS_WARNING, "CMOS fw version corrupted, initiating memory re-init\n");
+		init_cmos_partition_version(&version);
+	}
+	memcpy(&version.ish_version, ish_version, sizeof(struct fw_version));
+	write_cmos_partition_version(&version);
+}
+#endif
diff --git a/src/soc/intel/common/block/include/intelblocks/cse_cmos.h b/src/soc/intel/common/block/include/intelblocks/cse_cmos.h
index 8026a19..467b51c 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse_cmos.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse_cmos.h
@@ -11,4 +11,11 @@
 /* Function to update the cse version stored in CMOS memory */
 void set_cmos_cse_version(const struct fw_version *cse_version);

+#if CONFIG_SOC_INTEL_CACHE_ISH_VERSION_IN_CMOS
+/* Function to get the ish version stored in CMOS memory */
+void get_cmos_ish_version(struct fw_version  *ish_version);
+/* Function to update the ish version stored in CMOS memory */
+void set_cmos_ish_version(const struct fw_version  *ish_version);
+#endif /* CONFIG_SOC_INTEL_CACHE_ISH_VERSION_IN_CMOS */
+
 #endif /* SOC_INTEL_COMMON_BLOCK_CSE_CMOS_H */