Attention is currently required from: Ccong Chen, Hung-Te Lin, Jarried Lin, Yidi Lin.
Yu-Ping Wu has posted comments on this change by Ccong Chen. ( https://review.coreboot.org/c/coreboot/+/85599?usp=email )
Change subject: soc/meidatek/mt8196: Add SPM loader ......................................................................
Patch Set 4:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85599/comment/070146aa_50ebb4e0?usp... : PS4, Line 13: Add
``` Also fix the SPM register definitions. ```
File src/soc/mediatek/mt8196/include/soc/spm.h:
https://review.coreboot.org/c/coreboot/+/85599/comment/8ebb2aed_1ff964df?usp... : PS4, Line 639: u32 reserved2[9]; Revert these unrelated changes.
https://review.coreboot.org/c/coreboot/+/85599/comment/761ac694_dd63040f?usp... : PS4, Line 1120: 0x2ac Use upper case for all these hex numbers.
File src/soc/mediatek/mt8196/include/soc/spm.h:
https://review.coreboot.org/c/coreboot/+/85599/comment/01b723ef_1505497c?usp... : PS1, Line 201: u8 reg_apifr_mem_apsrc_req_mask_b;
The original definition is wrong. It's not setting for mt8196, and this code did not run before. […]
Got it.
File src/soc/mediatek/mt8196/spm.c:
https://review.coreboot.org/c/coreboot/+/85599/comment/5e863864_88b3a28f?usp... : PS4, Line 831: write32p(mtk_vlpcfg->debug_mon_reg[0] `write32(&mtk_vlpcfg->debug_mon_reg[0]`
Same below.