Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47825 )
Change subject: mb/clevo/kbl-u: mainboard ops ......................................................................
mb/clevo/kbl-u: mainboard ops
Change-Id: I82f1eaf6693d9b117fb211776047058cdc787288 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/clevo/kbl-u/ramstage.c 1 file changed, 5 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/47825/1
diff --git a/src/mainboard/clevo/kbl-u/ramstage.c b/src/mainboard/clevo/kbl-u/ramstage.c index b5d6786..4ba244d 100644 --- a/src/mainboard/clevo/kbl-u/ramstage.c +++ b/src/mainboard/clevo/kbl-u/ramstage.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <mainboard/gpio.h> -#include <soc/ramstage.h>
/* * TODO: @@ -12,7 +11,11 @@ * - Make TBT port configurable (TBT <> DisplayPort) */
-void mainboard_silicon_init_params(FSP_SIL_UPD *params) +static void init_mainboard(void *chip_info) { mainboard_configure_gpios(); } + +struct chip_operations mainboard_ops = { + .init = init_mainboard, +};
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47825 )
Change subject: mb/clevo/kbl-u: Configure GPIOs using mainboard_ops ......................................................................
Patch Set 5:
This change is ready for review.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47825 )
Change subject: mb/clevo/kbl-u: Configure GPIOs using mainboard_ops ......................................................................
Patch Set 5: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47825 )
Change subject: mb/clevo/kbl-u: Configure GPIOs using mainboard_ops ......................................................................
mb/clevo/kbl-u: Configure GPIOs using mainboard_ops
Hook up the mainboard_ops driver and configure the GPIOs using .init, since mainboard_silicon_init_params() is meant for the configuration of the FSP, not the GPIOs.
Change-Id: I82f1eaf6693d9b117fb211776047058cdc787288 Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/47825 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Michael Niewöhner foss@mniewoehner.de --- M src/mainboard/clevo/kbl-u/ramstage.c 1 file changed, 6 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/clevo/kbl-u/ramstage.c b/src/mainboard/clevo/kbl-u/ramstage.c index b5d6786..9368021e 100644 --- a/src/mainboard/clevo/kbl-u/ramstage.c +++ b/src/mainboard/clevo/kbl-u/ramstage.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <device/device.h> #include <mainboard/gpio.h> -#include <soc/ramstage.h>
/* * TODO: @@ -12,7 +12,11 @@ * - Make TBT port configurable (TBT <> DisplayPort) */
-void mainboard_silicon_init_params(FSP_SIL_UPD *params) +static void init_mainboard(void *chip_info) { mainboard_configure_gpios(); } + +struct chip_operations mainboard_ops = { + .init = init_mainboard, +};
-
Felix Singer (Code Review) -
Michael Niewöhner (Code Review)