Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45692 )
Change subject: soc/intel/icelake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
soc/intel/icelake/acpi/gpio.asl: Use ASL 2.0 syntax
While we're at it, fix up cosmetics on a few comments. The GADD method seems to suffer from copy-paste symptoms. A follow-up will address this.
Some methods deliberately remain untouched in this commit, so as not to collide with another patch train that already takes care of them.
Tested with BUILD_TIMELESS=1, Intel Ice Lake U RVP does not change.
Change-Id: I613f5f65638b92ca23f3ce15a15dd063afa52c31 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/icelake/acpi/gpio.asl 1 file changed, 30 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/45692/1
diff --git a/src/soc/intel/icelake/acpi/gpio.asl b/src/soc/intel/icelake/acpi/gpio.asl index 43aa83c..da22ba6 100644 --- a/src/soc/intel/icelake/acpi/gpio.asl +++ b/src/soc/intel/icelake/acpi/gpio.asl @@ -26,32 +26,32 @@ /* GPIO Community 0 */ CreateDWordField (^RBUF, ^COM0._BAS, BAS0) CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - Store (^^PCRB (PID_GPIOCOM0), BAS0) - Store (GPIO_BASE_SIZE, LEN0) + BAS0 = ^^PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
/* GPIO Community 1 */ CreateDWordField (^RBUF, ^COM1._BAS, BAS1) CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - Store (^^PCRB (PID_GPIOCOM1), BAS1) - Store (GPIO_BASE_SIZE, LEN1) + BAS1 = ^^PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
/* GPIO Community 2 */ CreateDWordField (^RBUF, ^COM2._BAS, BAS2) CreateDWordField (^RBUF, ^COM2._LEN, LEN2) - Store (^^PCRB (PID_GPIOCOM2), BAS2) - Store (GPIO_BASE_SIZE, LEN2) + BAS2 = ^^PCRB (PID_GPIOCOM2) + LEN2 = GPIO_BASE_SIZE
/* GPIO Community 4 */ CreateDWordField (^RBUF, ^COM4._BAS, BAS4) CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - Store (^^PCRB (PID_GPIOCOM4), BAS4) - Store (GPIO_BASE_SIZE, LEN4) + BAS4 = ^^PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
/* GPIO Community 5 */ CreateDWordField (^RBUF, ^COM5._BAS, BAS5) CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - Store (^^PCRB (PID_GPIOCOM5), BAS5) - Store (GPIO_BASE_SIZE, LEN5) + BAS5 = ^^PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
Return (RBUF) } @@ -69,38 +69,39 @@ Method (GADD, 1, NotSerialized) { /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_G0), LLessEqual (Arg0, GPP_A23))) + If ((Arg0 >= GPP_G0) && (Arg0 <= GPP_A23)) { - Store (PID_GPIOCOM0, Local0) - Subtract (Arg0, GPP_A0, Local1) + Local0 = PID_GPIOCOM0 + Local1 = Arg0 - GPP_A0 } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_H0), LLessEqual (Arg0, GPP_F19))) + If ((Arg0 >= GPP_H0) && (Arg0 <= GPP_F19)) { - Store (PID_GPIOCOM1, Local0) - Subtract (Arg0, GPP_D0, Local1) + Local0 = PID_GPIOCOM1 + Local1 = Arg0 - GPP_D0 } /* GPIO Community 2 */ - If (LAnd (LGreaterEqual (Arg0, GPD0), LLessEqual (Arg0, GPD11))) + If ((Arg0 >= GPD0) && (Arg0 <= GPD11)) { - Store (PID_GPIOCOM2, Local0) - Subtract (Arg0, GPD0, Local1) + Local0 = PID_GPIOCOM2 + Local1 = Arg0 - GPD0 } /* GPIO Community 4 */ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_E23))) + If ((Arg0 >= GPP_C0) && (Arg0 <= GPP_E23)) { - Store (PID_GPIOCOM4, Local0) - Subtract (Arg0, GPP_C0, Local1) + Local0 = PID_GPIOCOM4 + Local1 = Arg0 - GPP_C0 } - /* GPIO Community 05*/ - If (LAnd (LGreaterEqual (Arg0, GPP_R0), LLessEqual (Arg0, GPP_S7))) + /* GPIO Community 5 */ + If ((Arg0 >= GPP_R0) && (Arg0 <= GPP_S7)) { - Store (PID_GPIOCOM5, Local0) - Subtract (Arg0, GPP_R0, Local1) + Local0 = PID_GPIOCOM5 + Local1 = Arg0 - GPP_R0 } - Store (PCRB (Local0), Local2) - Add (Local2, PAD_CFG_BASE, Local2) - Return (Add (Local2, Multiply (Local1, 16))) + + Local2 = PCRB (Local0) + Local2 += PAD_CFG_BASE + Return (Local2 + (Local1 * 16)) }
/*
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45692 )
Change subject: soc/intel/icelake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
Patch Set 1: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45692 )
Change subject: soc/intel/icelake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
Patch Set 1:
Awesome Angel
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45692 )
Change subject: soc/intel/icelake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
soc/intel/icelake/acpi/gpio.asl: Use ASL 2.0 syntax
While we're at it, fix up cosmetics on a few comments. The GADD method seems to suffer from copy-paste symptoms. A follow-up will address this.
Some methods deliberately remain untouched in this commit, so as not to collide with another patch train that already takes care of them.
Tested with BUILD_TIMELESS=1, Intel Ice Lake U RVP does not change.
Change-Id: I613f5f65638b92ca23f3ce15a15dd063afa52c31 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45692 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- M src/soc/intel/icelake/acpi/gpio.asl 1 file changed, 30 insertions(+), 29 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved
diff --git a/src/soc/intel/icelake/acpi/gpio.asl b/src/soc/intel/icelake/acpi/gpio.asl index 4498818..12a4e18 100644 --- a/src/soc/intel/icelake/acpi/gpio.asl +++ b/src/soc/intel/icelake/acpi/gpio.asl @@ -26,32 +26,32 @@ /* GPIO Community 0 */ CreateDWordField (^RBUF, ^COM0._BAS, BAS0) CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - Store (^^PCRB (PID_GPIOCOM0), BAS0) - Store (GPIO_BASE_SIZE, LEN0) + BAS0 = ^^PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
/* GPIO Community 1 */ CreateDWordField (^RBUF, ^COM1._BAS, BAS1) CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - Store (^^PCRB (PID_GPIOCOM1), BAS1) - Store (GPIO_BASE_SIZE, LEN1) + BAS1 = ^^PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
/* GPIO Community 2 */ CreateDWordField (^RBUF, ^COM2._BAS, BAS2) CreateDWordField (^RBUF, ^COM2._LEN, LEN2) - Store (^^PCRB (PID_GPIOCOM2), BAS2) - Store (GPIO_BASE_SIZE, LEN2) + BAS2 = ^^PCRB (PID_GPIOCOM2) + LEN2 = GPIO_BASE_SIZE
/* GPIO Community 4 */ CreateDWordField (^RBUF, ^COM4._BAS, BAS4) CreateDWordField (^RBUF, ^COM4._LEN, LEN4) - Store (^^PCRB (PID_GPIOCOM4), BAS4) - Store (GPIO_BASE_SIZE, LEN4) + BAS4 = ^^PCRB (PID_GPIOCOM4) + LEN4 = GPIO_BASE_SIZE
/* GPIO Community 5 */ CreateDWordField (^RBUF, ^COM5._BAS, BAS5) CreateDWordField (^RBUF, ^COM5._LEN, LEN5) - Store (^^PCRB (PID_GPIOCOM5), BAS5) - Store (GPIO_BASE_SIZE, LEN5) + BAS5 = ^^PCRB (PID_GPIOCOM5) + LEN5 = GPIO_BASE_SIZE
Return (RBUF) } @@ -69,36 +69,37 @@ Method (GADD, 1, NotSerialized) { /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_G0), LLessEqual (Arg0, GPP_A23))) + If ((Arg0 >= GPP_G0) && (Arg0 <= GPP_A23)) { - Store (PID_GPIOCOM0, Local0) - Subtract (Arg0, GPP_A0, Local1) + Local0 = PID_GPIOCOM0 + Local1 = Arg0 - GPP_A0 } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_H0), LLessEqual (Arg0, GPP_F19))) + If ((Arg0 >= GPP_H0) && (Arg0 <= GPP_F19)) { - Store (PID_GPIOCOM1, Local0) - Subtract (Arg0, GPP_D0, Local1) + Local0 = PID_GPIOCOM1 + Local1 = Arg0 - GPP_D0 } /* GPIO Community 2 */ - If (LAnd (LGreaterEqual (Arg0, GPD0), LLessEqual (Arg0, GPD11))) + If ((Arg0 >= GPD0) && (Arg0 <= GPD11)) { - Store (PID_GPIOCOM2, Local0) - Subtract (Arg0, GPD0, Local1) + Local0 = PID_GPIOCOM2 + Local1 = Arg0 - GPD0 } /* GPIO Community 4 */ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_E23))) + If ((Arg0 >= GPP_C0) && (Arg0 <= GPP_E23)) { - Store (PID_GPIOCOM4, Local0) - Subtract (Arg0, GPP_C0, Local1) + Local0 = PID_GPIOCOM4 + Local1 = Arg0 - GPP_C0 } - /* GPIO Community 05*/ - If (LAnd (LGreaterEqual (Arg0, GPP_R0), LLessEqual (Arg0, GPP_S7))) + /* GPIO Community 5 */ + If ((Arg0 >= GPP_R0) && (Arg0 <= GPP_S7)) { - Store (PID_GPIOCOM5, Local0) - Subtract (Arg0, GPP_R0, Local1) + Local0 = PID_GPIOCOM5 + Local1 = Arg0 - GPP_R0 } - Store (PCRB (Local0), Local2) - Add (Local2, PAD_CFG_BASE, Local2) - Return (Add (Local2, Multiply (Local1, 16))) + + Local2 = PCRB (Local0) + Local2 += PAD_CFG_BASE + Return (Local2 + (Local1 * 16)) }