Change in coreboot[master]: mb/google/guybrush: Switch from 33MHz to 66MHz SPI Speed

[Felix Held (Code Review)]

Attention is currently required from: Raul Rangel, Furquan Shaikh, Karthik Ramasubramanian.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56645 )

Change subject: mb/google/guybrush: Switch from 33MHz to 66MHz SPI Speed
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Patch Set 3:

(1 comment)

File src/mainboard/google/guybrush/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/56645/comment/54dc9cae_335e118e 
PS3, Line 13: 33M
> Are you referring to the 8 dummy cycles that are added for fast read command? What is the maximum su […]

yes, i was referring to the 8 dummy cycles for the fast read command that gives the flash more time to have the data ready to output. the maximum data rate for sequential reads can only be achieved when using the fast read commands. the maximum frequencies the flash can reach for the different modes should be in the flash chip's datasheet; non-ideal signal integrity in the board design might lower the maximum frequency though