Attention is currently required from: Jason Glenesk, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held.
Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/69470
to review the following change.
Change subject: WIP:soc/amd/morgana: Move PSP FWs to 0x20000 ......................................................................
WIP:soc/amd/morgana: Move PSP FWs to 0x20000
This address is defined by HW and can not moved to other address. The bottom 16M is mapped to 0xFF000000-0xFFFFFFFF. The upper 16M is empty.
Change-Id: I2b1c7f9a7488a4d5ef94f21099692a23c3f8d27c Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/amd/birman/Kconfig M src/mainboard/amd/birman/board.fmd M src/soc/amd/morgana/Makefile.inc 3 files changed, 22 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/69470/1
diff --git a/src/mainboard/amd/birman/Kconfig b/src/mainboard/amd/birman/Kconfig index 46e5e31..7db11fe 100644 --- a/src/mainboard/amd/birman/Kconfig +++ b/src/mainboard/amd/birman/Kconfig @@ -28,7 +28,7 @@
config AMD_FWM_POSITION_INDEX int - default 3 if CHROMEOS + default 5 help TODO: might need to be adapted for better placement of files in cbfs
diff --git a/src/mainboard/amd/birman/board.fmd b/src/mainboard/amd/birman/board.fmd index 6c6ad92..a713567 100644 --- a/src/mainboard/amd/birman/board.fmd +++ b/src/mainboard/amd/birman/board.fmd @@ -2,7 +2,7 @@ BIOS { EC 4K RW_MRC_CACHE 120K - FMAP 4K + FMAP 3K COREBOOT(CBFS) } } diff --git a/src/soc/amd/morgana/Makefile.inc b/src/soc/amd/morgana/Makefile.inc index 4ca7325..1bf7081 100644 --- a/src/soc/amd/morgana/Makefile.inc +++ b/src/soc/amd/morgana/Makefile.inc @@ -221,7 +221,7 @@ OPT_SPL_RW_AB_TABLE_FILE=$(call add_opt_prefix, $(SPL_RW_AB_TABLE_FILE), --spl-table)
# If vboot uses 2 RW slots, then 2 copies of PSP binaries are redundant -OPT_RECOVERY_AB_SINGLE_COPY=$(if $(CONFIG_VBOOT_SLOTS_RW_AB), --recovery-ab-single-copy) +OPT_RECOVERY_AB_SINGLE_COPY=--recovery-ab-single-copy
AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_APOB_ADDR) \ @@ -329,4 +329,9 @@ endif # CONFIG_SEPARATE_SIGNED_PSPFW endif
+$(call add_intermediate, expand32M) +expand32M: $(obj)/coreboot.pre + dd if=/dev/zero bs=$(call _toint,$(CONFIG_ROM_SIZE)) count=1 2> /dev/null | tr '\000' '\377' >> $(obj)/coreboot.pre + + endif # ($(CONFIG_SOC_AMD_MORGANA),y)