[S] Change in coreboot[main]: mb/google/nissa/var/riven: Disable external fivr

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83891?usp=email )

Change subject: mb/google/nissa/var/riven: Disable external fivr
......................................................................

mb/google/nissa/var/riven: Disable external fivr

In next phase, riven will remove external fivr. Use the board version
to config external fivr for backward compatibility and show message.

BUG=b:359062365
TEST=build, boot to OS, suspend/resume work normally.

Change-Id: Id5f538b2eda7820a922b8d9ee14b2bae7df3726c
Signed-off-by: David Wu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83891
Tested-by: build bot (Jenkins) 
Reviewed-by: Subrata Banik 
Reviewed-by: Eric Lai 
---
M src/mainboard/google/brya/variants/riven/Makefile.mk
M src/mainboard/google/brya/variants/riven/overridetree.cb
A src/mainboard/google/brya/variants/riven/variant.c
3 files changed, 30 insertions(+), 15 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Eric Lai: Looks good to me, approved
  Subrata Banik: Looks good to me, approved

diff --git a/src/mainboard/google/brya/variants/riven/Makefile.mk b/src/mainboard/google/brya/variants/riven/Makefile.mk
index 8ae0e3b..86ba20d 100644
--- a/src/mainboard/google/brya/variants/riven/Makefile.mk
+++ b/src/mainboard/google/brya/variants/riven/Makefile.mk
@@ -4,4 +4,5 @@
 romstage-y += gpio.c

ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
+ramstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-y += gpio.c
diff --git a/src/mainboard/google/brya/variants/riven/overridetree.cb b/src/mainboard/google/brya/variants/riven/overridetree.cb
index 22a1bfc..701277d 100644
--- a/src/mainboard/google/brya/variants/riven/overridetree.cb
+++ b/src/mainboard/google/brya/variants/riven/overridetree.cb
@@ -82,21 +82,6 @@
    register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth port for PCIe WLAN
    register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth port for CNVi WLAN

-	# Configure external V1P05/Vnn/VnnSx Rails
-	register "ext_fivr_settings" = "{
-		.configure_ext_fivr = 1,
-		.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0,
-		.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
-		.vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX,
-		.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
-		.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE,
-		.v1p05_voltage_mv = 1050,
-		.vnn_voltage_mv = 780,
-		.vnn_sx_voltage_mv = 1050,
-		.v1p05_icc_max_ma = 500,
-		.vnn_icc_max_ma = 500,
-	}"
-
    # Enable the Cnvi BT Audio Offload
    register "cnvi_bt_audio_offload" = "1"

diff --git a/src/mainboard/google/brya/variants/riven/variant.c b/src/mainboard/google/brya/variants/riven/variant.c
new file mode 100644
index 0000000..15460ce
--- /dev/null
+++ b/src/mainboard/google/brya/variants/riven/variant.c
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <baseboard/variants.h>
+#include <boardid.h>
+
+void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
+{
+	const uint32_t id = board_id();
+	if (id != BOARD_ID_UNKNOWN && id >= 2) /* proto1 = 0, proto2 = 1 */
+		return;
+
+	config->ext_fivr_settings.configure_ext_fivr = 1;
+	config->ext_fivr_settings.v1p05_enable_bitmap =
+			FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0;
+	config->ext_fivr_settings.vnn_enable_bitmap =
+			FIVR_ENABLE_ALL_SX;
+	config->ext_fivr_settings.vnn_sx_enable_bitmap =
+			FIVR_ENABLE_ALL_SX;
+	config->ext_fivr_settings.v1p05_supported_voltage_bitmap =
+			FIVR_VOLTAGE_NORMAL;
+	config->ext_fivr_settings.vnn_supported_voltage_bitmap =
+			FIVR_VOLTAGE_MIN_ACTIVE;
+	config->ext_fivr_settings.v1p05_voltage_mv = 1050;
+	config->ext_fivr_settings.vnn_voltage_mv = 780;
+	config->ext_fivr_settings.vnn_sx_voltage_mv = 1050;
+	config->ext_fivr_settings.v1p05_icc_max_ma = 500;
+	config->ext_fivr_settings.vnn_icc_max_ma = 500;
+	printk(BIOS_INFO, "Configured External FIVR\n");
+}