[XL] Change in coreboot[main]: soc/intel/ptl: Add SoC ACPI directory for Panther Lake

[Ravishankar Sarawadi (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Jamie Ryu, Kapil Porwal, Pranava Y N, Subrata Banik, Wonkyu Kim.

Ravishankar Sarawadi has posted comments on this change by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email )

Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
......................................................................

Patch Set 29:

(9 comments)

File src/soc/intel/pantherlake/acpi/serialio.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/e5725e5b_cf4e2a70?usp... :
PS23, Line 47: Device (I3C0)
             : {
             : 	Name (_ADR, 0x00110000)
             : 	Name (_DDN, "Serial IO I3C Controller 0")
             : }
             : 
             : Device (I3C1)
             : {
             : 	Name (_ADR, 0x00110002)
             : 	Name (_DDN, "Serial IO I3C Controller 1")
             : }
> do we have any usage for I3C debugging ? I don't believe so

Removing for now, would add if use case arises in future.

File src/soc/intel/pantherlake/acpi/southbridge.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/cfebd350_3bcf490d?usp... :
PS23, Line 47: /* UFS 0:17:0 */
             : #include "ufs.asl"
> based on my understanding, PTL-U only has UFS controller hence, not sure if keeping ufs. […]

UFS, IMO, we can add as feature enable later, removing for now.

File src/soc/intel/pantherlake/acpi/tcss.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/97b30acb_5952653e?usp... :
PS23, Line 512: 				If (_SB.PCI0.TDM1.IF30 != 1) {
              : 					Return
              : 				}
              :
> as i have doubted previously as well, you are pushing some stale code w/o bothering looking into wha […]

Acknowledged

https://review.coreboot.org/c/coreboot/+/83772/comment/c5c77406_d9025292?usp... :
PS23, Line 727: 			If (TRE0 == 1) {
> again same stale code […]

Fixed.

File src/soc/intel/pantherlake/acpi/tcss_dma.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/11089234_f6213341?usp... :
PS23, Line 15: 	IF30,  1,	/* ITBT FW Version Bit30 */
> don't need

Acknowledged

File src/soc/intel/pantherlake/acpi/tcss_pcierp.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/ddff7f8b_1db429ee?usp... :
PS23, Line 12: 	Offset(0x51),
> why ? as there is no bit-field

Acknowledged

https://review.coreboot.org/c/coreboot/+/83772/comment/e11a25a9_db7b4b79?usp... :
PS23, Line 56: 0xBAC
> use macro?

I could, I will try adding macros to a few more in next patch.

File src/soc/intel/pantherlake/acpi/tcss_xhci.asl:

https://review.coreboot.org/c/coreboot/+/83772/comment/791343cc_dc19e6b5?usp... :
PS23, Line 166: 2
> 0 aka _SB.PCI0.TDM1. […]

Acknowledged

https://review.coreboot.org/c/coreboot/+/83772/comment/331fb9cc_6aae04b2?usp... :
PS23, Line 183: 3
> 1 aka _SB.PCI0.TDM1. […]

Acknowledged