Change in coreboot[master]: mb/google/volteer/v/volteer2: Config for passive USB-C DB on C1

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47501 )

Change subject: mb/google/volteer/v/volteer2: Config for passive USB-C DB on C1
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Patch Set 5:

(2 comments)

https://review.coreboot.org/c/coreboot/+/47501/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47501/3//COMMIT_MSG@10 
PS3, Line 10: volteer
> 75 doesn't look right in gerrit.

I think it's supposed to be 72 chars?

https://review.coreboot.org/c/coreboot/+/47501/3/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/variants/baseboard/include/baseboard/gpio.h:

https://review.coreboot.org/c/coreboot/+/47501/3/src/mainboard/google/voltee... 
PS3, Line 34: #define TGL_GPIO_ID_GPP_E22	0x090E0016
            : #define TGL_GPIO_ID_GPP_E23	0x090E0017
            : 
I think we can do a little better here too 😊
suggestion:
```
#define VW_SHIFT 0x16
#define IOM_AUX_ORIENTATION_BIAS_GPIO(vw, bit, gid) ((vw & 0xff) << 0x16) | ((bit & 0x7) << 8) | ((gid & 0xff))

#define TGL_IOM_GPIO_E22 IOM_AUX_ORIENTATION_BIAS_GPIO(0xE, 0, 0x16)
#define TGL_IOM_GPIO_E23 IOM_AUX_ORIENTATION_BIAS_GPIO(0xE, 0, 0x17)
```
except that I'm not sure where you get the 0x09 from the high byte. I see those as "Reserved" bits in the EDS (v 1.2)