Change in coreboot[master]: mb/google/hatch/var/scout: improve USB2 port 4 strength

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60131 )

Change subject: mb/google/hatch/var/scout: improve USB2 port 4 strength
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mb/google/hatch/var/scout: improve USB2 port 4 strength

Set USB2 port 4 pre emphasis to 15mV for passing USB2 port 4 SI (margin eye diagram).

BUG=b:210755120
TEST=emerge-ambassadorcoreboot chromeos-bootimage; Build local fw and pass to HW for measuring USB2 port 4 eye diagram.

Signed-off-by: Kenneth Chan 
Change-Id: I8163b2be6c9094eaf08efc0325cf211235556dc8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60131
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Angel Pons 
---
M src/mainboard/google/hatch/variants/scout/overridetree.cb
1 file changed, 8 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/google/hatch/variants/scout/overridetree.cb b/src/mainboard/google/hatch/variants/scout/overridetree.cb
index 9b33621..07c64db 100644
--- a/src/mainboard/google/hatch/variants/scout/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/scout/overridetree.cb
@@ -42,7 +42,14 @@
    	.pre_emp_bias  = USB2_BIAS_28P15MV,
    	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
    }" # Type-A Port 3
-	register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port
+	register "usb2_ports[3]" = "{
+		.enable = 1,
+		.ocpin = OC_SKIP,
+		.tx_bias = USB2_BIAS_0MV,
+		.tx_emp_enable = USB2_PRE_EMP_ON,
+		.pre_emp_bias  = USB2_BIAS_28P15MV,
+		.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
+	}" # Type-C Port
    register "usb2_ports[4]" = "{
    	.enable = 1,
    	.ocpin = OC_SKIP,