Change in coreboot[master]: soc/intel/common/cse: Helper API to know CSE SPI Protection Mode

[Subrata Banik (Code Review)]

Attention is currently required from: Felix Singer, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Patrick Rudolph, EricR Lai.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60403 )

Change subject: soc/intel/common/cse: Helper API to know CSE SPI Protection Mode
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Patch Set 3:

(1 comment)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/60403/comment/e528459a_c47d0786 
PS3, Line 265: 	if (!hfs1.fields.mfg_mode)
> if the compiler just see the bit-wise, it will always correct since the same bit, maybe add comment  […]

Do you mean, adding comment saying, mfg_mode and spi_protection_mode are just same bit as per EDS but renamed since TGL ?