build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40877 )
Change subject: soc/intel/skl: always enable SataPwrOptEnable ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40877/3/src/soc/intel/skylake/chip.... File src/soc/intel/skylake/chip.c:
https://review.coreboot.org/c/coreboot/+/40877/3/src/soc/intel/skylake/chip.... PS3, Line 264: * For unknown reasons FSP skips SATA init steps, resulting in (link) errors, unaligned write line over 96 characters
https://review.coreboot.org/c/coreboot/+/40877/3/src/soc/intel/skylake/chip.... PS3, Line 265: * errors and others. Enabling this makes FSP write the SATA SIR, which solves these problems. line over 96 characters