Attention is currently required from: Eric Lai, Jérémy Compostella, Kapil Porwal, Pranava Y N.
Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84236?usp=email )
Change subject: soc/intel/cmn/block/cpu: Simplify calculation of non-eviction ways
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Patch Set 2:
(1 comment)
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/84236/comment/6c1b2b3b_66807089?usp... :
PS1, Line 519: add %edx, %eax
I find this a bit suspicous, let's take an example: with `CONFIG_DCACHE_RAM_SIZE` at 0x200000 and %ecx (way size) at 0x180000, %edx should be at 0x80000. If you add the remainder to the quotient, you get way count = %eax = 0x80001 isn't ?
for sure, I missed adding the `testl` logic to check if EDX is zero or not before incrementing the quotient.
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