[S] Change in coreboot[master]: soc/intel/common: Add common function to disable LT memory lock

[Jérémy Compostella (Code Review)]

Attention is currently required from: Jérémy Compostella, Angel Pons.

Hello build bot (Jenkins), Tarun Tuli, Angel Pons,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/71655

to look at the new patch set (#5).

Change subject: soc/intel/common: Add common function to disable LT memory lock
......................................................................

soc/intel/common: Add common function to disable LT memory lock

Add a common function to unlock memory by setting MSR 0x2e6 to 0. If
internal chipset conditions are met, it unlocks access to the DRAM.

BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=romstage early graphics is operational

Change-Id: Ic666919ed51f683c9a1ef0b7ba061cd2949faf1e
Signed-off-by: Jeremy Compostella 
---
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/common/block/include/intelblocks/cpulib.h
M src/soc/intel/common/block/include/intelblocks/msr.h
3 files changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/71655/5