Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83929?usp=email )
Change subject: mb/google/dedede/var/awasuki: Modify DPTF parameters ......................................................................
mb/google/dedede/var/awasuki: Modify DPTF parameters
Modify DPTF parameters from thermal team.
1. Add TCHG. 2. Modify the charging limit.
BUG=b:360066326 TEST=Modify Thermal according to design requirements
Change-Id: Ia7050b552656a70da0c992e4f54b02ccb6a7c114 Signed-off-by: Wei Hualin weihualin@huaqin.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83929 Reviewed-by: Weimin Wu wuweimin@huaqin.corp-partner.google.com Reviewed-by: Eric Lai ericllai@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Sumeet R Pawnikar --- M src/mainboard/google/dedede/variants/awasuki/overridetree.cb 1 file changed, 12 insertions(+), 13 deletions(-)
Approvals: Sumeet R Pawnikar: Looks good to me, approved Weimin Wu: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/google/dedede/variants/awasuki/overridetree.cb b/src/mainboard/google/dedede/variants/awasuki/overridetree.cb index 2b153d0..ad28296 100644 --- a/src/mainboard/google/dedede/variants/awasuki/overridetree.cb +++ b/src/mainboard/google/dedede/variants/awasuki/overridetree.cb @@ -55,18 +55,18 @@
# Power limit config register "power_limits_config[JSL_N4500_6W_CORE]" = "{ - .tdp_pl1_override = 7, - .tdp_pl2_override = 20, + .tdp_pl1_override = 5, + .tdp_pl2_override = 15, }"
register "power_limits_config[JSL_N6000_6W_CORE]" = "{ - .tdp_pl1_override = 7, - .tdp_pl2_override = 20, + .tdp_pl1_override = 5, + .tdp_pl2_override = 15, }"
register "power_limits_config[JSL_N5100_6W_CORE]" = "{ - .tdp_pl1_override = 7, - .tdp_pl2_override = 20, + .tdp_pl1_override = 5, + .tdp_pl2_override = 15, }"
# TCC activation offset @@ -91,7 +91,7 @@ ## Passive Policy register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 50, 5000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 68, 5000), + [1] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 68, 5000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 68, 5000), [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 68, 5000), }" @@ -107,15 +107,15 @@
register "controls.power_limits.pl1" = "{ .min_power = 5000, - .max_power = 7000, + .max_power = 9000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 28 * MSECS_PER_SEC, .granularity = 125, }"
register "controls.power_limits.pl2" = "{ - .min_power = 20000, - .max_power = 20000, + .min_power = 15000, + .max_power = 15000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 1000, @@ -125,9 +125,8 @@ register "controls.charger_perf" = "{ [0] = { 255, 3000 }, [1] = { 32, 2000 }, - [2] = { 24, 1500 }, - [3] = { 16, 1000 }, - [4] = { 8, 500 } + [2] = { 16, 1000 }, + [3] = { 8, 500 } }" device generic 0 on end end