Attention is currently required from: Martin L Roth.
Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85752?usp=email )
Change subject: RISC-V: add "PIE" ......................................................................
RISC-V: add "PIE"
Change-Id: I00cf5a00e39a60a64cf1368a0846d4d62f7cac72 Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M util/xcompile/xcompile 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/85752/1
diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 3fb0cb7..3271e2f 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -265,6 +265,9 @@ riscv) testcc "$GCC" "$FLAGS_GCC -march=rv64iadc_zicsr_zifencei" && ARCH_SUFFIX="_zicsr_zifencei" + CFLAGS_GCC="$CFLAGS_GCC -fPIE" && + CFLAGS_CLANG="$CFLAGS_CLANG -fPIE" + LDFLAGS="$LDFLAGS --pie" ;; esac }