[S] Change in coreboot[main]: soc/amd/glinda: Update SCI mapping - coreboot-gerrit

16 Sep 2024


      Attention is currently required from: Maximilian Brune.
Felix Held has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84381?usp=email )
Change subject: soc/amd/glinda: Update SCI mapping
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Patch Set 1:
(1 comment)
File src/soc/amd/glinda/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/84381/comment/1c31edf1_bdb80c84?usp... :
PS1, Line 68: #define   XHCI0_DEV		0x0
            : #define   XHCI0_FUNC		0
            : #define   XHCI0_DEVFN		PCI_DEVFN(XHCI0_DEV, XHCI0_FUNC)
this one should be moved below the correct internal bus C
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I5eaed888109b89c25bcf0ba91abefa7c36c1851b
Gerrit-Change-Number: 84381
Gerrit-PatchSet: 1
Gerrit-Owner: Maximilian Brune maximilian.brune@9elements.com
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Attention: Maximilian Brune maximilian.brune@9elements.com
Gerrit-Comment-Date: Mon, 16 Sep 2024 16:11:58 +0000
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