Change in coreboot[master]: soc/amd/common/block: Add spi_hw mutex

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Julius Werner, Rob Barnes, Karthik Ramasubramanian, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58926 )

Change subject: soc/amd/common/block: Add spi_hw mutex
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Patch Set 2:

(1 comment)

Patchset:

PS2:
> I assume flash reads during DMA should be avoided too?  If so, are you guaranteeing that by using DM […]

Flash reads using the SPI registers will also be problematic. This CL should handle that case. Thought I don't think we really have anything that does that. mmap reads are fine during a DMA transaction. The LPC arbitration logic handles that correctly. As for FSP reading the MRC cache, this will be a mmap read, so it will be fine.