Patch set updated for coreboot: 10dbe8f amd/amdfam10: Fix reset during AMD Family 10h FID/VID setup

[Timothy Pearson]

Timothy Pearson ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8260

-gerrit

commit 10dbe8f659296c9b903371f25c12d6c083a73677
Author: Timothy Pearson 
Date:   Fri Jan 23 20:19:44 2015 -0600

amd/amdfam10: Fix reset during AMD Family 10h FID/VID setup

Reset was caused by invalid MSR access due to index off-by-one
    error.  Verified against AMD BKDG.

TEST: ASUS KFSN4-DRE booted K10 CPUs with proper FID/VID values.

Change-Id: I943748a9a0389a75102675e1722ab3a7d1ce6a49
    Signed-off-by: Timothy Pearson 
---
 src/cpu/amd/model_10xxx/fidvid.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/cpu/amd/model_10xxx/fidvid.c b/src/cpu/amd/model_10xxx/fidvid.c
index d3c67a9..ad31b8d 100644
--- a/src/cpu/amd/model_10xxx/fidvid.c
+++ b/src/cpu/amd/model_10xxx/fidvid.c
@@ -1,6 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
+ * Copyright (C) 2015 Timothy Pearson , Raptor Engineering
  * Copyright (C) 2007 Advanced Micro Devices, Inc.
  *
  * This program is free software; you can redistribute it and/or modify
@@ -322,7 +323,7 @@ static void recalculateVsSlamTimeSettingOnCorePre(device_t dev)

/* Get PSmax's index */
    msr = rdmsr(0xC0010061);
-	bValue = (u8) ((msr.lo >> PS_MAX_VAL_SHFT) & BIT_MASK_3);
+	bValue = (u8) (((msr.lo >> PS_MAX_VAL_SHFT) & BIT_MASK_3) - 1);

/* Get PSmax's VID */
    msr = rdmsr(0xC0010064 + bValue);