HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30787
Change subject: mb/mainboard/amd/serengeti_cheetah_fam10: Use PCI_DEVFN() ......................................................................
mb/mainboard/amd/serengeti_cheetah_fam10: Use PCI_DEVFN()
Change-Id: Ica2ea269152c30ded7c865adc2454bccc4f986ec Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/30787/1
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c index 4ce5285..8fc7153 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c @@ -101,7 +101,7 @@ u32 busn = (sysconf.pci1234[i] >> 12) & 0xff; u32 devn = sysconf.hcdn[i] & 0xff;
- write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8, + write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; slot_num++; @@ -110,12 +110,12 @@ }
#if CONFIG_CBB - write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0xdef8, 0x2, + write_pirq_info(pirq_info, CONFIG_CBB, PCI_DEVFN(0, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; slot_num++; if (sysconf.nodes > 32) { - write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1, + write_pirq_info(pirq_info, CONFIG_CBB - 1, PCI_DEVFN(0, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++;
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30787 )
Change subject: mb/mainboard/amd/serengeti_cheetah_fam10: Use PCI_DEVFN() ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/30787/2/src/mainboard/amd/serengeti_cheetah_... File src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c:
https://review.coreboot.org/#/c/30787/2/src/mainboard/amd/serengeti_cheetah_... PS2, Line 104: write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0xdef8, line over 80 characters
https://review.coreboot.org/#/c/30787/2/src/mainboard/amd/serengeti_cheetah_... PS2, Line 113: write_pirq_info(pirq_info, CONFIG_CBB, PCI_DEVFN(0, 0), 0x1, 0xdef8, 0x2, line over 80 characters
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30787 )
Change subject: mb/mainboard/amd/serengeti_cheetah_fam10: Use PCI_DEVFN() ......................................................................
Patch Set 2: Code-Review+2
Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30787 )
Change subject: mb/mainboard/amd/serengeti_cheetah_fam10: Use PCI_DEVFN() ......................................................................
mb/mainboard/amd/serengeti_cheetah_fam10: Use PCI_DEVFN()
Change-Id: Ica2ea269152c30ded7c865adc2454bccc4f986ec Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/30787 Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c 1 file changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c index 4ce5285..8fc7153 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c @@ -101,7 +101,7 @@ u32 busn = (sysconf.pci1234[i] >> 12) & 0xff; u32 devn = sysconf.hcdn[i] & 0xff;
- write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8, + write_pirq_info(pirq_info, busn, PCI_DEVFN(devn, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; slot_num++; @@ -110,12 +110,12 @@ }
#if CONFIG_CBB - write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0xdef8, 0x2, + write_pirq_info(pirq_info, CONFIG_CBB, PCI_DEVFN(0, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; slot_num++; if (sysconf.nodes > 32) { - write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1, + write_pirq_info(pirq_info, CONFIG_CBB - 1, PCI_DEVFN(0, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++;