Attention is currently required from: Tim Wawrzynczak. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62943 )
Change subject: soc/intel/alderlake: Allow retrieving FSP timestamp information ......................................................................
soc/intel/alderlake: Allow retrieving FSP timestamp information
This patch selects GET_FSP_TIMESTAMP kconfig and attempts to dump the FSP timestamp information before jumping into payload
BUG=b:216635831 TEST=Able to dump FSP performance data with GET_FSP_TIMESTAMP Kconfig selected and met the FSP prerequisites. +--------------------------------------------------+ |------ FSP Performance Timestamp Table Dump ------| +--------------------------------------------------+ |Perf-ID Timestamp(ms) String/GUID | +--------------------------------------------------+ 0 460253 SEC 50 460263 PEI 40 460274 PreMem 1 495803 9b3ada4f-ae56-4c24-8deaf03b7558ae50 2 508959 9b3ada4f-ae56-4c24-8deaf03b7558ae50 1 515253 6141e486-7543-4f1a-a579ff532ed78e75 2 525453 6141e486-7543-4f1a-a579ff532ed78e75 1 532059 baeb5bee-5b33-480a-8ab7b29c85e7ceab 2 546806 baeb5bee-5b33-480a-8ab7b29c85e7ceab 1 553302 1b04374d-fa9c-420f-ac62fee6d45e8443 2 563859 1b04374d-fa9c-420f-ac62fee6d45e8443 1 569955 88c17e54-ebfe-4531-a992581029f58126 2 575753 88c17e54-ebfe-4531-a992581029f58126 1 582099 a8499e65-a6f6-48b0-96db45c266030d83 50f0 599599 unknown name 50f1 716649 unknown name 2 728507 a8499e65-a6f6-48b0-96db45c266030d83 1 734755 9e1cc850-6731-4848-87526673c7005eee ....
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: I568f18c6bc4f54e87f8763a331796f4a72d4c976 --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/finalize.c 2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/62943/1
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 38415e6..a9c0fcd 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -44,6 +44,7 @@ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3 select FSPS_HAS_ARCH_UPD select GENERIC_GPIO_LIB + select GET_FSP_TIMESTAMP select HAVE_DEBUG_RAM_SETUP select HAVE_FSP_GOP select INTEL_DESCRIPTOR_MODE_CAPABLE diff --git a/src/soc/intel/alderlake/finalize.c b/src/soc/intel/alderlake/finalize.c index 7498f3f..b2e9dbc 100644 --- a/src/soc/intel/alderlake/finalize.c +++ b/src/soc/intel/alderlake/finalize.c @@ -13,6 +13,7 @@ #include <cpu/x86/smm.h> #include <device/mmio.h> #include <device/pci.h> +#include <fsp/util.h> #include <intelblocks/cse.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> @@ -99,6 +100,9 @@ CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) heci_finalize();
+ /* Retrieve FSP Performance Timestamp */ + if (CONFIG(GET_FSP_TIMESTAMP)) + fsp_get_timestamp(); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); }