Change in coreboot[master]: Revert "src/soc/intel/cannonlake: Update C-state latency control limits"

[Michael Niewöhner (Code Review)]

Attention is currently required from: Bora Guvendik,  Felix Singer, Lijian Zhao, Shaunak Saha, Nico Huber, Martin Roth, Tim Wawrzynczak, Vaibhav Shankar, Aaron Durbin, Patrick Rudolph.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56662 )

Change subject: Revert "src/soc/intel/cannonlake: Update C-state latency control limits"
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Patch Set 1:

(1 comment)

Patchset:

PS1:
> reference to previous IRTL values(14nm)- 
> https://github.com/coreboot/coreboot/blob/master/src/soc/intel/skylake/cpu.c
>
> Why are we modfying cannonlake values ?

soc/cannonlake *is* Coffee Lake, it just wasn't renamed. So, this commit/revert actually changes Coffee Lake values, not Cannon Lake values.
> The cannon lake support was dropped. If you are using Coffe lake, then you might have to use board- skylake values becaue its based out of 14nm.

When CFL matches SKL, then this commit/revert is correct.