Change in coreboot[master]: Revert "Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for ...

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Nick Vaccaro, Ronak Kanabar, Zhuohao Lee, Patrick Rudolph.
Hello build bot (Jenkins), Nick Vaccaro, Ronak Kanabar, Zhuohao Lee, Patrick Rudolph,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/60031

to review the following change.

Change subject: Revert "Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02""
......................................................................

Revert "Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02""

This reverts commit a4dddfc3a3a48727ebcec727a0b1fd87eb4c14ad.

Reason for revert: Ready to land FSP 2471.02

Change-Id: I2d858edee2eb24506c3e55a1cb808a1ccbd58da2
---
M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
2 files changed, 8 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/60031/1

diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
index 271e01c..191ef27 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
@@ -3164,7 +3164,7 @@

/** Offset 0x0AA8 - Reserved
 **/
-  UINT8                       Reserved45[104];
+  UINT8                       Reserved45[136];
 } FSP_M_CONFIG;

/** Fsp M UPD Configuration
@@ -3183,11 +3183,11 @@
 **/
   FSP_M_CONFIG                FspmConfig;

-/** Offset 0x0B10
+/** Offset 0x0B30
 **/
-  UINT8                       UnusedUpdSpace31[6];
+  UINT8                       UnusedUpdSpace34[6];

-/** Offset 0x0B16
+/** Offset 0x0B36
 **/
   UINT16                      UpdTerminator;
 } FSPM_UPD;
diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
index ddf6ca8..a73fe59 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
@@ -3380,8 +3380,7 @@
   UINT8                       ProcHotLock;

/** Offset 0x0CF3 - Configuration for boot TDP selection
-  Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP
-  Up;0xFF : Deactivate
+  Deprecated. Move to premem.
 **/
   UINT8                       ConfigTdpLevel;

@@ -3869,7 +3868,7 @@

/** Offset 0x0FD5 - Reserved
 **/
-  UINT8                       Reserved56[19];
+  UINT8                       Reserved56[123];
 } FSP_S_CONFIG;

/** Fsp S UPD Configuration
@@ -3888,11 +3887,11 @@
 **/
   FSP_S_CONFIG                FspsConfig;

-/** Offset 0x0FE8
+/** Offset 0x1050
 **/
   UINT8                       UnusedUpdSpace42[6];

-/** Offset 0x0FEE
+/** Offset 0x1056
 **/
   UINT16                      UpdTerminator;
 } FSPS_UPD;