Attention is currently required from: Felix Singer, Jamie Ryu, Subrata Banik, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Paul Menzel, Angel Pons, Raj Astekar.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62772 )
Change subject: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
......................................................................
Patch Set 13:
(5 comments)
File src/soc/intel/meteorlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/62772/comment/f45b244d_535bc228
PS13, Line 51: Platform FSP integration guide document
Is this available yet?
File src/soc/intel/meteorlake/bootblock/soc_die.c:
https://review.coreboot.org/c/coreboot/+/62772/comment/208f7334_f0b394b4
PS13, Line 101: soc_die_early_iorange_init
does this need to be public?
File src/soc/intel/meteorlake/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/62772/comment/dd345fcb_cd0e0cea
PS13, Line 63:
: #define IOE_PCR_ABOVE_4G_BASE_ADDR 0x3fff0000000
: #define IOE_P2SB_BAR IOE_PCR_ABOVE_4G_BASE_ADDR
: #define IOE_P2SB_SIZE (256 * MiB)
:
: #define IOM_BASE_ADDR 0x3fff0aa0000
: #define IOM_BASE_SIZE 0x1600
: #define IOM_BASE_ADDR_MAX 0x3fff0aa15ff
does coreboot need to access these MMIO ranges?
File src/soc/intel/meteorlake/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/62772/comment/31cf649a_8f43fdda
PS13, Line 186: //#define PCH_DEV_SLOT_LPC PCI_DEV_SLOT_ESPI
not needed?
File src/soc/intel/meteorlake/include/soc/pcr_ids.h:
https://review.coreboot.org/c/coreboot/+/62772/comment/f09d644f_0a4d4bb5
PS13, Line 5: /*
nit: missing a blank line before `/*`
--
To view, visit
https://review.coreboot.org/c/coreboot/+/62772
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4
Gerrit-Change-Number: 62772
Gerrit-PatchSet: 13
Gerrit-Owner: Ravishankar Sarawadi
ravishankar.sarawadi@intel.com
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Ethan Tsao
ethan.tsao@intel.com
Gerrit-Reviewer: Jamie Ryu
jamie.m.ryu@intel.com
Gerrit-Reviewer: Raj Astekar
raj.astekar@intel.com
Gerrit-Reviewer: Subrata Banik
subratabanik@google.com
Gerrit-Reviewer: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-Reviewer: Wonkyu Kim
wonkyu.kim@intel.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Ethan Tsao
ethan.tsao@intel.corp-partner.google.com
Gerrit-CC: Felix Singer
felixsinger@posteo.net
Gerrit-CC: Paul Menzel
paulepanter@mailbox.org
Gerrit-CC: Ravishankar Sarawadi
ravishankar.sarawadi@intel.corp-partner.google.com
Gerrit-Attention: Felix Singer
felixsinger@posteo.net
Gerrit-Attention: Jamie Ryu
jamie.m.ryu@intel.com
Gerrit-Attention: Subrata Banik
subratabanik@google.com
Gerrit-Attention: Wonkyu Kim
wonkyu.kim@intel.com
Gerrit-Attention: Ethan Tsao
ethan.tsao@intel.com
Gerrit-Attention: Ravishankar Sarawadi
ravishankar.sarawadi@intel.com
Gerrit-Attention: Paul Menzel
paulepanter@mailbox.org
Gerrit-Attention: Angel Pons
th3fanbus@gmail.com
Gerrit-Attention: Raj Astekar
raj.astekar@intel.com
Gerrit-Attention: Ravishankar Sarawadi
ravishankar.sarawadi@intel.corp-partner.google.com
Gerrit-Comment-Date: Wed, 04 May 2022 20:34:49 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment