[M] Change in coreboot[master]: soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles

[Tim Van Patten (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, EricKY Cheng, Matt DeVillier, Chris Wang, Fred Reitberger, Karthikeyan Ramasubramanian, Felix Held.

Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68469 )

Change subject: soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles
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Patch Set 8:

(2 comments)

File src/soc/amd/mendocino/chip.h:

https://review.coreboot.org/c/coreboot/+/68469/comment/629d522f_f43528e5 
PS8, Line 81: 	uint32_t thermctl_limit_degreeC_B;
Looking at the table in https://b.corp.google.com/issues/232946420#comment116, `Thermctl Limit(APU)` is the same as table A for every case, so it can be removed for the rest of the tables (B/C/etc profile).

https://review.coreboot.org/c/coreboot/+/68469/comment/737b1846_456241d6 
PS8, Line 88: 	uint16_t stt_alpha_apu_B;
            : 	uint16_t stt_error_coeff_B;
            : 	uint16_t stt_error_rate_coefficient_B;
Looking at the table in https://b.corp.google.com/issues/232946420#comment116, these 3 values are the same as table A for every case, so they can be removed for the rest of the tables (B/C/etc profile).