New patch to review for coreboot: 5bf5c5a google/snow: Minor clean-ups for display setup code in ramstage

[David Hendricks]

David Hendricks ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3113

-gerrit

commit 5bf5c5aa127a1edbcc5f53fce5e243dd271a5ccd
Author: David Hendricks 
Date:   Thu Apr 18 16:45:47 2013 -0700

google/snow: Minor clean-ups for display setup code in ramstage

This just cleans up a few areas:
    - Removed an unnecessary delay from exynos_dp_bridge_setup()
    - The delay at the end of exynos_dp_bridge_init() is necessary, so
      removed the comment suggesting that it might not be.
    - Simplified exynos_dp_hotplug

Change-Id: I44150f5ef3958e333985440c1022b4f1544a93aa
    Signed-off-by: David Hendricks 
---
 src/mainboard/google/snow/ramstage.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index 962c79b..1b01758 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -98,8 +98,6 @@ static void exynos_dp_bridge_setup(void)
    gpio_set_pull(dp_rst_l, EXYNOS_GPIO_PULL_NONE);
    udelay(10);
    gpio_set_value(dp_rst_l, 1);
-
-	udelay(90000);	/* FIXME: this might be unnecessary */
 }

static void exynos_dp_bridge_init(void)
@@ -116,19 +114,13 @@ static void exynos_dp_bridge_init(void)
     * roughly 50ms after PD is de-asserted. The phantom high
     * makes it hard for us to know when the NXP chip is up.
     */
-	udelay(90000);	/* FIXME: this might be unnecessary */
+	udelay(90000);
 }

static int exynos_dp_hotplug(void)
 {
-	int x = gpio_get_value(dp_hpd);
    /* Check HPD.  If it's high, we're all good. */
-//	if (gpio_get_value(dp_hpd))
-//		return 0;
-	printk(BIOS_DEBUG, "%s: dp_hpd: 0x%02x\n", __func__, x);
-	if (x)
-		return 0;
-	return -1;
+	return gpio_get_value(dp_hpd) ? 0 : 1;
 }

static void exynos_dp_reset(void)