Change in coreboot[master]: cpu/haswell/*.c: Use static.c exposed lapic 0

[Angel Pons (Code Review)]

Attention is currently required from: Arthur Heymans, Raul Rangel, Tristan Corrick, Alexander Couzens, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59314 )

Change subject: cpu/haswell/*.c: Use static.c exposed lapic 0
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Patch Set 2:

(1 comment)

File src/mainboard/google/auron/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/59314/comment/6dd86287_86a0adab 
PS2, Line 20: 			device lapic 0xacac off end
> Just thinking out loud. […]

This devicetree structure wouldn't work because the CPU cluster device is used to do MP init. `src/soc/intel/broadwell/northbridge.c` function `broadwell_enable()` assigns the ops for the domain and cpu_cluster devices.

Granted, you could do this in the CPU chip, but you would then have two isolated chips in the devicetree, which doesn't make sense. It would no longer be a device tree!

In any case, I have no idea who decided to do it this way, nor why they chose this approach.