[M] Change in coreboot[main]: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING

[Jarried Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin.

Hello Crystal Guo, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85124?usp=email

to look at the new patch set (#18).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING
......................................................................

soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING

HW TX tracking works by writing a pattern to the designated DRAM buffer
and then reading it back automatically to calculate the appropriate TX
time delay. To avoid writing the pattern to system-used memory, we need
to permanently reserve last 64KB memory on each rank for the HW TX
tracking feature.

BUG=b:317009620
TEST=Reserve memory ok
Firmware shows the following log with 12GB DDR board:
00000001ffff0000-00000001ffffffff: RESERVED
000000037fff0000-000000037fffffff: RESERVED

Change-Id: I042a74c7fbdc0d3dc19dd6bfd2bf021fe1c2b5fc
Signed-off-by: Crystal Guo 
---
M src/soc/mediatek/mt8196/Makefile.mk
A src/soc/mediatek/mt8196/dramc_info.c
A src/soc/mediatek/mt8196/include/soc/dramc_info.h
M src/soc/mediatek/mt8196/soc.c
4 files changed, 52 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/85124/18