Change in coreboot[master]: soc/intel/common: Use heci_reset() in the CSE TX and RX flows - coreboot-gerrit

9 Mar 2022


      Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62587 )
Change subject: soc/intel/common: Use heci_reset() in the CSE TX and RX flows
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Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62587/comment/66d0dff4_91c65c6e 
PS2, Line 12: cse
...
nit: `CSE`, like you wrote above
Ack
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I3e4a97800cbc5d95b8fd259e6e34a32fc82d8563
Gerrit-Change-Number: 62587
Gerrit-PatchSet: 3
Gerrit-Owner: Sridhar Siricilla sridhar.siricilla@intel.com
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