[S] Change in coreboot[main]: soc/intel/common: Add CPU and PCIe IDs for Snow Ridge platform

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Attention is currently required from: Felix Singer, Jérémy Compostella, Paul Menzel, جوكر الطويل.

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Change subject: soc/intel/common: Add CPU and PCIe IDs for Snow Ridge platform
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Patch Set 8:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/83314/comment/90e09ca1_bd328f10?usp... :
PS1, Line 7: add CPU and PCIe definitions for SNR
> Suggestion: […]

Done

Commit Message:

https://review.coreboot.org/c/coreboot/+/83314/comment/85571f0e_f0221c31?usp... :
PS3, Line 8:
> These IDs are described in the EDS file of Snow Ridge SoC, I've added it in the commit message.

Done

File src/include/cpu/intel/cpu_ids.h:

https://review.coreboot.org/c/coreboot/+/83314/comment/dab2e3a1_eb4b6b58?usp... :
PS1, Line 86: #define CPUID_SNOWRIDGE_A0	0x80660
> Yes, I've added it.

Done