[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions

[Subrata Banik (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Felix Held, Hannah Williams, Jamie Ryu.

Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )

Change subject: soc/intel/common/block/pmc: Add GPE1 functions
......................................................................

Patch Set 14:

(1 comment)

File src/soc/intel/common/block/include/intelblocks/pmclib.h:

https://review.coreboot.org/c/coreboot/+/84104/comment/6fb594a7_6e2dc077?usp... :
PS11, Line 241: gpe0_mask
> Subrata, 
> I add an weak function to get the GPE1 event bits and change the gpe1 enable/disable to use its gpe1 masks instead of gpe0. note that pmc_disable_all_gpe and pmc_clear_all_gpe_status clear all EN and STS bits regardless of masks.

Can you follow sample implementation as below, which might eliminate the need for weak implementation and also may qualify in future to move the GPE implementation inside yet another common code file (pmc_gpe1.c)

```
pmclib.h
----------------
#if CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1)
void soc_pmc_enable_std_gpe1(uint32_t gpe0_mask);
#else
static inline void soc_pmc_enable_std_gpe1(uint32_t gpe0_mask)
{
    /* Default implementation, nop. */
    return;
}
#endif

pmclib.c
----------------
void pmc_enable_std_gpe(uint32_t mask)
{
    pmc_enable_gpe0(GPE_STD, mask);

if (!CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1))
    	return;

soc_pmc_enable_std_gpe1(); 
}

SoC Override when CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1=Y <---- this can now even move into a common code name pmc_gpe1.c when CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1, but nothing must have now. we can keep SOC implementation for PTL
--------------

#define GPE1_EN(x)		(0x1c + ((x) * 4))

static void soc_pmc_enable_gpe1_bits(int reg)
{
    uint32_t gpe1_en = inl(ACPI_BASE_ADDRESS + reg);
    gpe1_en |= 0xffffffff;
    outl(gpe1_en, ACPI_BASE_ADDRESS + reg);
}

void soc_pmc_enable_std_gpe1(uint32_t gpe0_mask_val)
{
    uint32_t gpe0_bit_mask[GPE1_REG_MAX] = {
        PME_B0_STS,
        HOT_PLUG_STS,
        PCI_EXP_STS
    };

for (int i = 0; i < GPE1_REG_MAX; i++) {
        if (gpe0_mask_val & gpe0_bit_mask[i] == gpe0_bit_mask[i])
            soc_pmc_get_gpe1_bits(GPE1_EN(i));
    }
}

```