Hello Paul Menzel,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/46015
to review the following change.
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super-i/o ......................................................................
mb/asus/f2a85-m_pro: Enable GPIO0 on the super-i/o
It was enabled by the vendor firmware.
Also drop spurious `io 0x60 = 0x00` setting. It's the default anyway and the resource is kept disabled (it's controlled by the virtual LDN 2e.008).
Change-Id: I351c93033bf2afd824eb6baa8d7625e7a33a295a Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/46015/1
diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb index 3f9135c..aa21321 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb @@ -61,8 +61,9 @@ irq 0xf7 = 0x00 irq 0xf8 = 0x00 end - device pnp 2e.8 off # WDT1, GPIO0, GPIO1 - io 0x60 = 0x00 + device pnp 2e.008 off # WDT1 + end + device pnp 2e.108 on # GPIO0, GPIO1 irq 0xe0 = 0xff irq 0xe1 = 0xff irq 0xe2 = 0xff
Paul Menzel has uploaded a new patch set (#2) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/46015 )
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super-i/o ......................................................................
mb/asus/f2a85-m_pro: Enable GPIO0 on the super-i/o
It is enabled by the vendor firmware.
Also drop spurious `io 0x60 = 0x00` setting. It's the default anyway and the resource is kept disabled (it's controlled by the virtual LDN 2e.008).
This fixes the hang in `PCI: 00:14.3 init` when doing `outb(0, DMA1_RESET_REG)`.
Fixes: 2f8192bc ("asus/f2a85m_pro: Fix superio type in devicetree") Change-Id: I351c93033bf2afd824eb6baa8d7625e7a33a295a Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/46015/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46015 )
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super-i/o ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG@7 PS2, Line 7: super-i/o Super I/O
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46015 )
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super-i/o ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG@7 PS2, Line 7: super-i/o
Super I/O
Technically, that would be `super I/O` wouldn't it?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46015 )
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super-i/o ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG@7 PS2, Line 7: super-i/o
Technically, that would be `super I/O` wouldn't it?
I don't mind either.
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46015
to look at the new patch set (#3).
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super I/O ......................................................................
mb/asus/f2a85-m_pro: Enable GPIO0 on the super I/O
It is enabled by the vendor firmware.
Also drop spurious `io 0x60 = 0x00` setting. It's the default anyway and the resource is kept disabled (it's controlled by the virtual LDN 2e.008).
This fixes the hang in `PCI: 00:14.3 init` when doing `outb(0, DMA1_RESET_REG)`.
Fixes: 2f8192bc ("asus/f2a85m_pro: Fix superio type in devicetree") Change-Id: I351c93033bf2afd824eb6baa8d7625e7a33a295a Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/46015/3
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46015 )
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super I/O ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46015/2//COMMIT_MSG@7 PS2, Line 7: super-i/o
I don't mind either.
Ack
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46015 )
Change subject: mb/asus/f2a85-m_pro: Enable GPIO0 on the super I/O ......................................................................
mb/asus/f2a85-m_pro: Enable GPIO0 on the super I/O
It is enabled by the vendor firmware.
Also drop spurious `io 0x60 = 0x00` setting. It's the default anyway and the resource is kept disabled (it's controlled by the virtual LDN 2e.008).
This fixes the hang in `PCI: 00:14.3 init` when doing `outb(0, DMA1_RESET_REG)`.
Fixes: 2f8192bc ("asus/f2a85m_pro: Fix superio type in devicetree") Change-Id: I351c93033bf2afd824eb6baa8d7625e7a33a295a Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/46015 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 3 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb index 3f9135c..aa21321 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb @@ -61,8 +61,9 @@ irq 0xf7 = 0x00 irq 0xf8 = 0x00 end - device pnp 2e.8 off # WDT1, GPIO0, GPIO1 - io 0x60 = 0x00 + device pnp 2e.008 off # WDT1 + end + device pnp 2e.108 on # GPIO0, GPIO1 irq 0xe0 = 0xff irq 0xe1 = 0xff irq 0xe2 = 0xff