Change in coreboot[master]: mb/google/brya/var/taeko4es: Fix PLD group order (W/A)

[Joey Peng (Code Review)]

Joey Peng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60187 )

Change subject: mb/google/brya/var/taeko4es: Fix PLD group order (W/A)
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mb/google/brya/var/taeko4es: Fix PLD group order (W/A)

In commit 667471b8d8 (ec/google/chromeec: Add PLD to EC conn in ACPI
table), PLD is added to ACPI table. It causes the DUT to not boot into
the OS. So fix the USB3/USB2 Type-C Port C2 PLD group order from 3 to 2
to solve this issue.

Fixes: 667471b8d8 ("ec/google/chromeec: Add PLD to EC conn in ACPI table")
BUG=b:209723556
BRANCH=none
TEST=build coreboot and boot into OS.

Signed-off-by: Joey Peng 
Change-Id: Iff1302fa758bcde1ce8b03c16f7cc6eac807e5c9
---
M src/mainboard/google/brya/variants/taeko4es/overridetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/60187/1

diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
index d485662..ff4feef 100644
--- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
@@ -443,7 +443,7 @@
    				chip drivers/usb/acpi
    					register "desc" = ""USB3 Type-C Port C1 (DB)""
    					register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
-						register "group" = "ACPI_PLD_GROUP(3, 1)"
+						register "group" = "ACPI_PLD_GROUP(2, 1)"
    					device ref tcss_usb3_port3 on
    						probe DB_USB DB_USB3_NO_A
    					end
@@ -463,7 +463,7 @@
    				chip drivers/usb/acpi
    					register "desc" = ""USB2 Type-C Port C1 (DB)""
    					register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
-						register "group" = "ACPI_PLD_GROUP(3, 1)"
+						register "group" = "ACPI_PLD_GROUP(2, 1)"
    					device ref usb2_port3 on
    						probe DB_USB DB_USB3_NO_A
    					end