[XS] Change in coreboot[master]: soc/intel/meteorlake: Hook up UPD PchHdaSdiEnable

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75529?usp=email )

Change subject: soc/intel/meteorlake: Hook up UPD PchHdaSdiEnable
......................................................................

soc/intel/meteorlake: Hook up UPD PchHdaSdiEnable

Hook the PchHdaSdiEnable UPD so that mainboard can change the
settings via devicetree. PchHdaSdiEnable UPD enable HDA SDI lanes.

BUG=b:273962021
TEST=Verified the settings on google/rex using debug FSP logs.

Change-Id: I43f1e59d28fc07218f8e25266f8ce3bdcf3f6e5c
Signed-off-by: Ronak Kanabar 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75529
Reviewed-by: Kapil Porwal 
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
Reviewed-by: Tarun Tuli 
---
M src/soc/intel/meteorlake/chip.h
M src/soc/intel/meteorlake/romstage/fsp_params.c
2 files changed, 7 insertions(+), 0 deletions(-)

Approvals:
  Kapil Porwal: Looks good to me, approved
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved
  Tarun Tuli: Looks good to me, approved

diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index acb3738..37a7615 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -19,6 +19,7 @@
 #include <stdint.h>

#define MAX_SAGV_POINTS 4
+#define MAX_HD_AUDIO_SDI_LINKS 2

/* Types of different SKUs */
 enum soc_intel_meteorlake_power_limits {
@@ -192,6 +193,8 @@
    /* Audio related */
    uint8_t pch_hda_dsp_enable;

+	bool pch_hda_sdi_enable[MAX_HD_AUDIO_SDI_LINKS];
+
    /* iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T */
    enum {
    	HDA_TMODE_2T = 0,
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index 171009f..0173060 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -223,6 +223,10 @@
    m_cfg->PchHdaIDispLinkTmode = config->pch_hda_idisp_link_tmode;
    m_cfg->PchHdaIDispLinkFrequency = config->pch_hda_idisp_link_frequency;
    m_cfg->PchHdaIDispCodecDisconnect = !config->pch_hda_idisp_codec_enable;
+
+	for (int i = 0; i < MAX_HD_AUDIO_SDI_LINKS; i++)
+		m_cfg->PchHdaSdiEnable[i] = config->pch_hda_sdi_enable[i];
+
    /*
     * All the PchHdaAudioLink{Hda|Dmic|Ssp|Sndw}Enable UPDs are used by FSP only to
     * configure GPIO pads for audio. Mainboard is expected to perform all GPIO