[XS] Change in coreboot[main]: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82730?usp=email )

Change subject: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports
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soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports

Apply commit c6b65c1a811e ("soc/intel/alderlake: Enable USB2 port reset
message on Type-C ports") to Meteor Lake.

This change is added to address the issue of USB3 ports downgrading to
high speed during low power modes and not returning back to super speed.

The patch enables port reset event on USB2 ports. This event is
is passed to USB3 upstream ports to upgrade back to super speed (USB3)
after a downgrade during low power state.

Change-Id: Iac702a8d8edd2b3b7e03abcac020be7e45335821
Signed-off-by: Jeremy Soller 
Signed-off-by: Tim Crawford 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82730
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/meteorlake/fsp_params.c
M src/soc/intel/meteorlake/include/soc/usb.h
2 files changed, 4 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved

diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index 36412b7..bf1d9d5 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -476,6 +476,8 @@
    		s_cfg->Usb2OverCurrentPin[i] = config->usb2_ports[i].ocpin;
    	else
    		s_cfg->Usb2OverCurrentPin[i] = OC_SKIP;
+
+		s_cfg->PortResetMessageEnable[i] = config->usb2_ports[i].type_c;
    }

max_port = get_max_usb30_port();
diff --git a/src/soc/intel/meteorlake/include/soc/usb.h b/src/soc/intel/meteorlake/include/soc/usb.h
index e339c72..70a367e 100644
--- a/src/soc/intel/meteorlake/include/soc/usb.h
+++ b/src/soc/intel/meteorlake/include/soc/usb.h
@@ -31,6 +31,7 @@
    uint8_t tx_emp_enable;
    uint8_t pre_emp_bias;
    uint8_t pre_emp_bit;
+	uint8_t type_c;
 };

/* USB Overcurrent pins definition */
@@ -112,6 +113,7 @@
    .tx_emp_enable = USB2_PRE_EMP_ON, \
    .pre_emp_bias  = USB2_BIAS_56P3MV, \
    .pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
+	.type_c	       = 1, \
 }

struct usb3_port_config {