Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
soc/intel: Use config_of_path(SA_DEVFN_ROOT)
We do not want to disguise somewhat complex function calls as simple macros.
Change-Id: I53324603c9ece1334c6e09d51338084166f7a585 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/poppy/variants/atlas/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/nocturne/mainboard.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/apollolake/pnpconfig.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/cpu.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/icelake/acpi.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/cpu.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/icelake/pmc.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/pmc.c M src/soc/intel/skylake/smmrelocate.c 30 files changed, 142 insertions(+), 161 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/34299/1
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index 54fd7df..5b0167a 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -221,8 +221,9 @@
static void mainboard_enable(struct device *dev) { - struct device *root = SA_DEV_ROOT; - config_t *conf = root->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
mainboard_set_power_limits(conf);
diff --git a/src/mainboard/google/poppy/variants/atlas/mainboard.c b/src/mainboard/google/poppy/variants/atlas/mainboard.c index 07a4e66..375dca6 100644 --- a/src/mainboard/google/poppy/variants/atlas/mainboard.c +++ b/src/mainboard/google/poppy/variants/atlas/mainboard.c @@ -37,8 +37,9 @@ /* Override dev tree settings per board */ void variant_devtree_update(void) { - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; + config_t *cfg = config_of_path(SA_DEVFN_ROOT); + if (!cfg) + return;
/* Update PL2 based on CPU */ cfg->tdp_pl2_override = get_pl2(); diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c index adb8c00..abfcc8b 100644 --- a/src/mainboard/google/poppy/variants/nami/mainboard.c +++ b/src/mainboard/google/poppy/variants/nami/mainboard.c @@ -234,11 +234,13 @@ uint32_t sku_id = variant_board_sku(); uint32_t i; int oem_index; - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; uint8_t pl2_id = PL2_ID_DEFAULT; struct device *spi_fpmcu = PCH_DEV_GSPI1;
+ config_t *cfg = config_of_path(SA_DEVFN_ROOT); + if (!cfg) + return; + switch (sku_id) { case SKU_0_SONA: case SKU_1_SONA: diff --git a/src/mainboard/google/poppy/variants/nautilus/mainboard.c b/src/mainboard/google/poppy/variants/nautilus/mainboard.c index 6d9f2e9..891ea14 100644 --- a/src/mainboard/google/poppy/variants/nautilus/mainboard.c +++ b/src/mainboard/google/poppy/variants/nautilus/mainboard.c @@ -41,11 +41,13 @@ void variant_devtree_update(void) { uint32_t sku_id = variant_board_sku(); - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; uint16_t abase; uint32_t val32;
+ config_t *cfg = config_of_path(SA_DEVFN_ROOT); + if (!cfg) + return; + switch (sku_id) { case SKU_0_NAUTILUS: /* Disable LTE module */ diff --git a/src/mainboard/google/poppy/variants/nocturne/mainboard.c b/src/mainboard/google/poppy/variants/nocturne/mainboard.c index 28d3d1b..e6ad242 100644 --- a/src/mainboard/google/poppy/variants/nocturne/mainboard.c +++ b/src/mainboard/google/poppy/variants/nocturne/mainboard.c @@ -38,8 +38,9 @@ /* Override dev tree settings per board */ void variant_devtree_update(void) { - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; + config_t *cfg = config_of_path(SA_DEVFN_ROOT); + if (!cfg) + return;
/* Update PL2 based on CPU */ cfg->tdp_pl2_override = get_pl2(); diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index cec706f..945cb5c 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -90,7 +90,6 @@ void acpi_create_gnvs(struct global_nvs_t *gnvs) { struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT;
/* Clear out GNVS. */ memset(gnvs, 0, sizeof(*gnvs)); @@ -110,11 +109,9 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu();
- if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); + config_t *cfg = config_of_path(SA_DEVFN_ROOT); + if (!cfg) return; - } - cfg = dev->chip_info;
/* Enable DPTF based on mainboard configuration */ gnvs->dpte = cfg->dptf_enable; @@ -158,7 +155,7 @@ void soc_fill_fadt(acpi_fadt_t *fadt) { const struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
fadt->pm_tmr_blk = ACPI_BASE_ADDRESS + PM1_TMR;
@@ -178,7 +175,7 @@ printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); return; } - cfg = dev->chip_info; + cfg = config_of(dev);
if(cfg->lpss_s0ix_enable) fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0; diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 1d5e6d9..fb655ad 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -295,7 +295,6 @@ static void set_power_limits(void) { static struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT; msr_t rapl_msr_reg, limit; uint32_t power_unit; uint32_t tdp, min_power, max_power; @@ -306,12 +305,9 @@ return; }
- if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); + conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return; - } - - cfg = dev->chip_info;
/* Get units */ rapl_msr_reg = rdmsr(MSR_PKG_POWER_SKU_UNIT); @@ -368,15 +364,11 @@ static void set_sci_irq(void) { static struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT; uint32_t scis;
- if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); + conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return; - } - - cfg = dev->chip_info;
/* Change only if a device tree entry exists. */ if (cfg->sci_irq) { @@ -550,7 +542,7 @@
static void parse_devicetree(FSP_S_CONFIG *silconfig) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
if (!dev) { printk(BIOS_ERR, "Could not find root device\n"); @@ -679,21 +671,21 @@ { FSP_S_CONFIG *silconfig = &silupd->FspsConfig; static struct soc_intel_apollolake_config *cfg; + struct device *dev;
/* Load VBT before devicetree-specific config. */ silconfig->GraphicsConfigPtr = (uintptr_t)vbt_get();
- struct device *dev = SA_DEV_ROOT; + dev = pcidev_path_on_root(SA_DEVFN_ROOT); + conf = config_of(dev);
- if (!dev || !dev->chip_info) { + if (!dev || !cfg) { printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); return; }
mainboard_devtree_update(dev);
- cfg = dev->chip_info; - /* Parse device tree and disable unused device*/ parse_devicetree(silconfig);
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index aad0f6b..53100e6 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -295,14 +295,9 @@
int soc_fill_sgx_param(struct sgx_param *sgx_param) { - struct device *dev = SA_DEV_ROOT; - assert(dev != NULL); - config_t *conf = dev->chip_info; - - if (!conf) { - printk(BIOS_ERR, "Failed to get chip_info for SGX param\n"); - return -1; - } + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
sgx_param->enable = conf->sgx_enable; return 0; diff --git a/src/soc/intel/apollolake/pnpconfig.c b/src/soc/intel/apollolake/pnpconfig.c index f9d493e..fecb27c 100644 --- a/src/soc/intel/apollolake/pnpconfig.c +++ b/src/soc/intel/apollolake/pnpconfig.c @@ -37,8 +37,11 @@ int index; size_t arrsize; const struct pnpconfig *pnpconfigarr; - struct device *dev = SA_DEV_ROOT; - struct soc_intel_apollolake_config *config = dev->chip_info; + struct soc_intel_apollolake_config *config; + conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; + switch (config->pnp_settings) { case PNP_PERF: pnpconfigarr = perf; diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 25867c5..8efb0f5 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -386,12 +386,14 @@
static void generate_C_state_entries(void) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; acpi_cstate_t map[3]; int *set; int i;
+ config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; + if (config->s0ix_enable) set = cstate_set_s0ix; else diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index 5592538..462d252 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -195,8 +195,9 @@
static void initialize_vr_config(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; msr_t msr;
printk(BIOS_DEBUG, "Initializing VR config.\n"); @@ -450,8 +451,8 @@
static void configure_thermal_target(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); + config_t *conf = config_of(dev); msr_t msr;
/* Set TCC activation offset if supported */ diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c index 5dd076f..98c3c4c 100644 --- a/src/soc/intel/broadwell/smmrelocate.c +++ b/src/soc/intel/broadwell/smmrelocate.c @@ -270,7 +270,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 26c2847..dcee464 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -144,8 +144,11 @@ ARRAY_SIZE(cstate_set_non_s0ix))]; int *set; int i; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; + int is_s0ix_enable = config->s0ix_enable;
if (is_s0ix_enable) { @@ -165,10 +168,12 @@
void soc_power_states_generation(int core_id, int cores_per_package) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; + + /* Generate P-state tables */ if (config->eist_enable) - /* Generate P-state tables */ generate_p_state_entries(core_id, cores_per_package); }
@@ -176,7 +181,7 @@ { const uint16_t pmbase = ACPI_BASE_ADDRESS; const struct device *dev = PCH_DEV_LPC; - const struct soc_intel_cannonlake_config *config = dev->chip_info; + const struct soc_intel_cannonlake_config *conf = config_of(dev);
if (!config->PmTimerDisabled) { fadt->pm_tmr_blk = pmbase + PM1_TMR; @@ -201,7 +206,7 @@ void acpi_create_gnvs(struct global_nvs_t *gnvs) { const struct device *dev = PCH_DEV_LPC; - const struct soc_intel_cannonlake_config *config = dev->chip_info; + const struct soc_intel_cannonlake_config *conf = config_of(dev);
/* Set unknown wake source */ gnvs->pm1i = -1; diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index faddbd5..9c7ebb5 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -170,13 +170,10 @@ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; - const struct device *dev; - dev = pcidev_on_root(SA_DEV_SLOT_ROOT, 0); - if (!dev || !dev->chip_info) + const config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return;
- const config_t *config = dev->chip_info; - if (config->gpio_override_pm) memcpy(value, config->gpio_pm, sizeof(uint8_t) * TOTAL_GPIO_COMM); diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index 7dae615..cd0734d 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -105,8 +105,10 @@ unsigned int power_unit; unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1; u8 power_limit_1_val; - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
if (power_limit_1_time > ARRAY_SIZE(power_limit_time_sec_to_msr)) power_limit_1_time = 28; @@ -234,12 +236,13 @@
static void configure_isst(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; msr_t msr;
if (conf && conf->speed_shift_enable) { - /* + /* * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP * is supported or not. coreboot needs to configure MSR 0x1AA * which is then reflected in the CPUID register. @@ -260,12 +263,9 @@
static void configure_misc(void) { - struct device *dev = SA_DEV_ROOT; - if (!dev) { - printk(BIOS_ERR, "SA_DEV_ROOT device not found!\n"); + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return; - } - config_t *conf = dev->chip_info; msr_t msr;
msr = rdmsr(IA32_MISC_ENABLE); @@ -367,8 +367,9 @@
static void configure_thermal_target(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; msr_t msr;
/* Set TCC activation offset if supported */ diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index a58a97c..2bc893d 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -97,13 +97,9 @@
static void parse_devicetree(FSP_S_CONFIG *params) { - struct device *dev = SA_DEV_ROOT; - if (!dev) { - printk(BIOS_ERR, "Could not find root device\n"); + const config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return; - } - - const config_t *config = dev->chip_info;
parse_devicetree_param(config, params); } @@ -147,8 +143,11 @@ int i; FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + struct device *dev; + + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
/* Parse device tree and enable/disable devices */ parse_devicetree(params); diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c index 8eb81b0..31c6837 100644 --- a/src/soc/intel/cannonlake/pmc.c +++ b/src/soc/intel/cannonlake/pmc.c @@ -153,8 +153,9 @@
static void pmc_init(void *unused) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
rtc_init();
diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c index 47efa18..2576c9c 100644 --- a/src/soc/intel/cannonlake/smmrelocate.c +++ b/src/soc/intel/cannonlake/smmrelocate.c @@ -256,7 +256,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
diff --git a/src/soc/intel/denverton_ns/memmap.c b/src/soc/intel/denverton_ns/memmap.c index 514d86d..2561922 100644 --- a/src/soc/intel/denverton_ns/memmap.c +++ b/src/soc/intel/denverton_ns/memmap.c @@ -30,7 +30,7 @@ #if defined(__SIMPLE_DEVICE__) pci_devfn_t dev = SA_DEV_ROOT; #else - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); #endif /* All regions concerned for have 1 MiB alignment. */ return ALIGN_DOWN(pci_read_config32(dev, reg), 1 * MiB); diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index ae7b344..7f1c50f 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -137,8 +137,11 @@ ARRAY_SIZE(cstate_set_non_s0ix))]; int *set; int i; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; + int is_s0ix_enable = config->s0ix_enable;
if (is_s0ix_enable) { @@ -158,8 +161,8 @@
void soc_power_states_generation(int core_id, int cores_per_package) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); + config_t *conf = config_of(dev); if (config->eist_enable) /* Generate P-state tables */ generate_p_state_entries(core_id, cores_per_package); @@ -169,7 +172,7 @@ { const uint16_t pmbase = ACPI_BASE_ADDRESS; const struct device *dev = pcidev_on_root(0, 0); - const struct soc_intel_icelake_config *config = dev->chip_info; + const struct soc_intel_icelake_config *conf = config_of(dev);
if (!config->PmTimerDisabled) { fadt->pm_tmr_blk = pmbase + PM1_TMR; @@ -194,7 +197,7 @@ void acpi_create_gnvs(struct global_nvs_t *gnvs) { const struct device *dev = pcidev_on_root(0, 0); - const struct soc_intel_icelake_config *config = dev->chip_info; + const struct soc_intel_icelake_config *conf = config_of(dev);
/* Set unknown wake source */ gnvs->pm1i = -1; diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index ceef266..dbc9d26 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -107,13 +107,10 @@ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; - const struct device *dev; - dev = pcidev_on_root(SA_DEV_SLOT_ROOT, 0); - if (!dev || !dev->chip_info) + const config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return;
- const config_t *config = dev->chip_info; - if (config->gpio_override_pm) memcpy(value, config->gpio_pm, sizeof(uint8_t) * TOTAL_GPIO_COMM); diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c index 67d41d7..541a474 100644 --- a/src/soc/intel/icelake/cpu.c +++ b/src/soc/intel/icelake/cpu.c @@ -40,8 +40,9 @@
static void configure_isst(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return; msr_t msr;
if (conf->speed_shift_enable) { @@ -66,8 +67,8 @@
static void configure_misc(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); + config_t *conf = config_of(dev); msr_t msr;
msr = rdmsr(IA32_MISC_ENABLE); diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index 03b00d9..45da6c0 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -29,13 +29,10 @@
static void parse_devicetree(FSP_S_CONFIG *params) { - struct device *dev = pcidev_on_root(0, 0); - if (!dev) { - printk(BIOS_ERR, "Could not find root device\n"); + const struct soc_intel_icelake_config *config; + conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return; - } - - const struct soc_intel_icelake_config *config = dev->chip_info;
for (int i = 0; i < CONFIG_SOC_INTEL_I2C_DEV_MAX; i++) params->SerialIoI2cMode[i] = config->SerialIoI2cMode[i]; @@ -55,8 +52,12 @@ { int i; FSP_S_CONFIG *params = &supd->FspsConfig; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + + struct device *dev; + const struct soc_intel_icelake_config *config; + conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
/* Parse device tree and enable/disable devices */ parse_devicetree(params); diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c index d98c83e..39e4564 100644 --- a/src/soc/intel/icelake/pmc.c +++ b/src/soc/intel/icelake/pmc.c @@ -135,8 +135,9 @@
static void pmc_init(void *unused) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
rtc_init();
diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c index 4e2d684..926ef63 100644 --- a/src/soc/intel/icelake/smmrelocate.c +++ b/src/soc/intel/icelake/smmrelocate.c @@ -255,7 +255,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 910db97..e3ec810 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -174,8 +174,7 @@
static void acpi_create_gnvs(global_nvs_t *gnvs) { - const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct soc_intel_skylake_config *config = dev->chip_info; + const struct soc_intel_skylake_config *config = config_of_path(PCH_DEVFN_LPC);
/* Set unknown wake source */ gnvs->pm1i = -1; @@ -234,9 +233,8 @@
void acpi_fill_fadt(acpi_fadt_t *fadt) { - const struct device *dev = SA_DEV_ROOT; - const config_t *config = dev ? dev->chip_info : NULL; const uint16_t pmbase = ACPI_BASE_ADDRESS; + config_t *config = config_of_path(SA_DEVFN_ROOT);
/* Use ACPI 3.0 revision */ fadt->header.revision = get_acpi_table_revision(FADT); @@ -506,9 +504,8 @@ int totalcores = dev_count_cpu(); int cores_per_package = get_cores_per_package(); int numcpus = totalcores/cores_per_package; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; - int is_s0ix_enable = config->s0ix_enable; + config_t *config = config_of_path(SA_DEVFN_ROOT); + int is_s0ix_enable = config && config->s0ix_enable; int max_c_state;
if (is_s0ix_enable) @@ -619,7 +616,7 @@ unsigned long current, struct acpi_rsdp *const rsdp) { - const struct soc_intel_skylake_config *const config = dev->chip_info; + const struct soc_intel_skylake_config *const config = config_of(dev); acpi_dmar_t *const dmar = (acpi_dmar_t *)current;
/* Create DMAR table only if we have VT-d capability. */ @@ -695,8 +692,7 @@ /* Save wake source information for calculating ACPI _SWS values */ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) { - const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct soc_intel_skylake_config *config = dev->chip_info; + const struct soc_intel_skylake_config *config = config_of_path(PCH_DEVFN_LPC); struct chipset_power_state *ps; static uint32_t gpe0_sts[GPE0_REG_MAX]; uint32_t pm1_en; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index a1fced2..5a7e61a 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -233,15 +233,13 @@ FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig; static struct soc_intel_skylake_config *config; + struct device *dev; uintptr_t vbt_data = (uintptr_t)vbt_get(); int i;
- struct device *dev = SA_DEV_ROOT; - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); + config = config_of_path(SA_DEVFN_ROOT); + if (!config) return; - } - config = dev->chip_info;
mainboard_silicon_init_params(params); /* Set PsysPmax if it is available from DT */ diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index a63809b..8be8871 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -116,8 +116,10 @@ unsigned int power_unit; unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1; u8 power_limit_1_val; - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) + return;
if (power_limit_1_time > ARRAY_SIZE(power_limit_time_sec_to_msr)) power_limit_1_time = 28; @@ -240,8 +242,7 @@
static void configure_thermal_target(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
/* Set TCC activation offset if supported */ @@ -260,11 +261,10 @@
static void configure_isst(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
- if (conf->speed_shift_enable) { + if (conf && conf->speed_shift_enable) { /* * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP is supported or not. coreboot needs to configure MSR 0x1AA @@ -286,21 +286,18 @@
static void configure_misc(void) { - struct device *dev = SA_DEV_ROOT; - if (!dev) { - printk(BIOS_ERR, "SA_DEV_ROOT device not found!\n"); - return; - } - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= (1 << 0); /* Fast String enable */ msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ - if (conf->eist_enable) + + if (conf && conf->eist_enable) msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ else msr.lo &= ~(1 << 16); /* Enhanced SpeedStep Disable */ + wrmsr(IA32_MISC_ENABLE, msr);
/* Disable Thermal interrupts */ @@ -559,19 +556,9 @@
int soc_fill_sgx_param(struct sgx_param *sgx_param) { - struct device *dev = SA_DEV_ROOT; - config_t *conf; - - if (!dev) { - printk(BIOS_ERR, "Failed to get root dev for checking SGX param\n"); + config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return -1; - } - - conf = dev->chip_info; - if (!conf) { - printk(BIOS_ERR, "Failed to get chip_info for SGX param\n"); - return -1; - }
sgx_param->enable = conf->sgx_enable; return 0; diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index 01def44..dd45d7f 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -181,7 +181,7 @@
void pmc_soc_init(struct device *dev) { - const config_t *config = dev->chip_info; + const config_t *config = config_of(dev);
rtc_init();
@@ -233,13 +233,10 @@ */ static void pm1_handle_wake_pin(void *unused) { - struct device *dev = SA_DEV_ROOT; - - if (!dev || !dev->chip_info) + const config_t *conf = config_of_path(SA_DEVFN_ROOT); + if (!conf) return;
- const config_t *conf = dev->chip_info; - /* If WAKE# pin is enabled, bail out early. */ if (conf->deep_sx_config & DSX_EN_WAKE_PIN) return; diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index 12ed26a..7286187 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -265,7 +265,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 1:
So this fails to build, but what do you think about the idea?
I think we could just die() in config_of() in case chip_info == NULL, for integrated devices on root bus.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 1:
Patch Set 1:
So this fails to build, but what do you think about the idea?
I think this is a good first step!
I think we could just die() in config_of() in case chip_info == NULL, for integrated devices on root bus.
Sounds good. "BUG:" should attract attention too.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 1:
The change looks good to me.
Hello Patrick Rudolph, Vanny E, build bot (Jenkins), Furquan Shaikh, David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34299
to look at the new patch set (#2).
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
soc/intel: Use config_of_path(SA_DEVFN_ROOT)
We do not want to disguise somewhat complex function calls as simple macros.
Change-Id: I53324603c9ece1334c6e09d51338084166f7a585 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/poppy/variants/atlas/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/nocturne/mainboard.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/apollolake/pmutil.c M src/soc/intel/apollolake/pnpconfig.c M src/soc/intel/apollolake/romstage.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/cpu.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/common/block/chip/chip.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/icelake/acpi.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/cpu.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/icelake/pmc.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/pmc.c M src/soc/intel/skylake/smmrelocate.c 33 files changed, 99 insertions(+), 207 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/34299/2
Hello Patrick Rudolph, Vanny E, build bot (Jenkins), Furquan Shaikh, David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34299
to look at the new patch set (#3).
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
soc/intel: Use config_of_path(SA_DEVFN_ROOT)
We do not want to disguise somewhat complex function calls as simple macros.
Change-Id: I53324603c9ece1334c6e09d51338084166f7a585 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/poppy/variants/atlas/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/nocturne/mainboard.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/apollolake/pmutil.c M src/soc/intel/apollolake/pnpconfig.c M src/soc/intel/apollolake/romstage.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/cpu.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/common/block/chip/chip.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/icelake/acpi.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/cpu.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/icelake/pmc.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/pmc.c M src/soc/intel/skylake/romstage/systemagent.c M src/soc/intel/skylake/smmrelocate.c 34 files changed, 101 insertions(+), 211 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/34299/3
Hello Patrick Rudolph, Vanny E, build bot (Jenkins), Furquan Shaikh, David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34299
to look at the new patch set (#4).
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
soc/intel: Use config_of_path(SA_DEVFN_ROOT)
We do not want to disguise somewhat complex function calls as simple macros.
Change-Id: I53324603c9ece1334c6e09d51338084166f7a585 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/poppy/variants/atlas/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/nocturne/mainboard.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/apollolake/pmutil.c M src/soc/intel/apollolake/pnpconfig.c M src/soc/intel/apollolake/romstage.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/cpu.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/common/block/chip/chip.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/icelake/acpi.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/cpu.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/icelake/pmc.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/pmc.c M src/soc/intel/skylake/romstage/systemagent.c M src/soc/intel/skylake/smmrelocate.c 34 files changed, 101 insertions(+), 212 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/34299/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ac... File src/soc/intel/apollolake/acpi.c:
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ac... PS4, Line 172: cfg If cfg was NULL, control would never reach here.
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ch... File src/soc/intel/apollolake/chip.c:
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ch... PS4, Line 677: if (!dev || !cfg) If cfg or dev is NULL, control would never reach here.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 4:
(1 comment)
Jacob, Elyes : Is one of you regularly running clang static analyzer passed?
I wonder if it goes wild on this commit. My attempt here is to use __noreturn pcidev_die() called from inlined function. Is that enough / not required at all, to convince config_of() never returns with NULL.
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ac... File src/soc/intel/apollolake/acpi.c:
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ac... PS4, Line 172: cfg
If cfg was NULL, control would never reach here.
Right, I think there are more cases than the two you have spotted.
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 4:
Patch Set 4:
(1 comment)
Jacob, Elyes : Is one of you regularly running clang static analyzer passed?
I wonder if it goes wild on this commit. My attempt here is to use __noreturn pcidev_die() called from inlined function. Is that enough / not required at all, to convince config_of() never returns with NULL.
Hi Kyösti, yes scan-build actually runs daily, you can see the results here if you like [0]. Making the function __noreturn should be enough to convince it that config_of() will never return with NULL. It's also probably a good thing to remove the extra checks that Furquan has pointed out, since otherwise Coverity will flag them as dead code (it's very clever).
[0] https://www.coreboot.org/scan-build/
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 4:
Hi Kyösti, yes scan-build actually runs daily, you can see the results here if you like [0]. Making the function __noreturn should be enough to convince it that config_of() will never return with NULL. It's also probably a good thing to remove the extra checks that Furquan has pointed out, since otherwise Coverity will flag them as dead code (it's very clever).
I could not see a commit hash in scan-build output, I assume it runs on master HEAD always.
But we shall see the results once we submit this, and find remaining redundant NULL checks then. I fixed the ones easily discovered with grep.
Hello Patrick Rudolph, HAOUAS Elyes, Vanny E, Jacob Garber, build bot (Jenkins), Furquan Shaikh, David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34299
to look at the new patch set (#5).
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
soc/intel: Use config_of_path(SA_DEVFN_ROOT)
We do not want to disguise somewhat complex function calls as simple macros.
Change-Id: I53324603c9ece1334c6e09d51338084166f7a585 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/poppy/variants/atlas/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/nocturne/mainboard.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/apollolake/pmutil.c M src/soc/intel/apollolake/pnpconfig.c M src/soc/intel/apollolake/romstage.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/cpu.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/common/block/chip/chip.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/icelake/acpi.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/cpu.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/icelake/pmc.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/pmc.c M src/soc/intel/skylake/romstage/systemagent.c M src/soc/intel/skylake/smmrelocate.c 34 files changed, 102 insertions(+), 215 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/34299/5
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 5: Code-Review+1
LGTM. +1 to let others take a look. If no objections, I can go ahead and +2 in a day.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 6: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 6: Code-Review+2
LGTM
David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 6: Code-Review+1
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ac... File src/soc/intel/apollolake/acpi.c:
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ac... PS4, Line 172: cfg
Right, I think there are more cases than the two you have spotted.
Done
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ch... File src/soc/intel/apollolake/chip.c:
https://review.coreboot.org/c/coreboot/+/34299/4/src/soc/intel/apollolake/ch... PS4, Line 677: if (!dev || !cfg)
If cfg or dev is NULL, control would never reach here.
Done
Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34299 )
Change subject: soc/intel: Use config_of_path(SA_DEVFN_ROOT) ......................................................................
soc/intel: Use config_of_path(SA_DEVFN_ROOT)
We do not want to disguise somewhat complex function calls as simple macros.
Change-Id: I53324603c9ece1334c6e09d51338084166f7a585 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34299 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: David Guckian Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/poppy/variants/atlas/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/nocturne/mainboard.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/apollolake/pmutil.c M src/soc/intel/apollolake/pnpconfig.c M src/soc/intel/apollolake/romstage.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/cpu.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/common/block/chip/chip.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/icelake/acpi.c M src/soc/intel/icelake/chip.c M src/soc/intel/icelake/cpu.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/icelake/pmc.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/cpu.c M src/soc/intel/skylake/pmc.c M src/soc/intel/skylake/romstage/systemagent.c M src/soc/intel/skylake/smmrelocate.c 34 files changed, 102 insertions(+), 215 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Angel Pons: Looks good to me, approved David Guckian: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index 54fd7df..6b3423b 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -221,8 +221,7 @@
static void mainboard_enable(struct device *dev) { - struct device *root = SA_DEV_ROOT; - config_t *conf = root->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT);
mainboard_set_power_limits(conf);
diff --git a/src/mainboard/google/poppy/variants/atlas/mainboard.c b/src/mainboard/google/poppy/variants/atlas/mainboard.c index 07a4e66..d4db98e 100644 --- a/src/mainboard/google/poppy/variants/atlas/mainboard.c +++ b/src/mainboard/google/poppy/variants/atlas/mainboard.c @@ -37,8 +37,7 @@ /* Override dev tree settings per board */ void variant_devtree_update(void) { - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; + config_t *cfg = config_of_path(SA_DEVFN_ROOT);
/* Update PL2 based on CPU */ cfg->tdp_pl2_override = get_pl2(); diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c index adb8c00..1ec9e3a 100644 --- a/src/mainboard/google/poppy/variants/nami/mainboard.c +++ b/src/mainboard/google/poppy/variants/nami/mainboard.c @@ -234,11 +234,11 @@ uint32_t sku_id = variant_board_sku(); uint32_t i; int oem_index; - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; uint8_t pl2_id = PL2_ID_DEFAULT; struct device *spi_fpmcu = PCH_DEV_GSPI1;
+ config_t *cfg = config_of_path(SA_DEVFN_ROOT); + switch (sku_id) { case SKU_0_SONA: case SKU_1_SONA: diff --git a/src/mainboard/google/poppy/variants/nautilus/mainboard.c b/src/mainboard/google/poppy/variants/nautilus/mainboard.c index 6d9f2e9..9aa6b72 100644 --- a/src/mainboard/google/poppy/variants/nautilus/mainboard.c +++ b/src/mainboard/google/poppy/variants/nautilus/mainboard.c @@ -41,11 +41,11 @@ void variant_devtree_update(void) { uint32_t sku_id = variant_board_sku(); - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; uint16_t abase; uint32_t val32;
+ config_t *cfg = config_of_path(SA_DEVFN_ROOT); + switch (sku_id) { case SKU_0_NAUTILUS: /* Disable LTE module */ diff --git a/src/mainboard/google/poppy/variants/nocturne/mainboard.c b/src/mainboard/google/poppy/variants/nocturne/mainboard.c index 28d3d1b..f00394c 100644 --- a/src/mainboard/google/poppy/variants/nocturne/mainboard.c +++ b/src/mainboard/google/poppy/variants/nocturne/mainboard.c @@ -38,8 +38,7 @@ /* Override dev tree settings per board */ void variant_devtree_update(void) { - struct device *root = SA_DEV_ROOT; - config_t *cfg = root->chip_info; + config_t *cfg = config_of_path(SA_DEVFN_ROOT);
/* Update PL2 based on CPU */ cfg->tdp_pl2_override = get_pl2(); diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index cec706f..f729f31 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -90,7 +90,7 @@ void acpi_create_gnvs(struct global_nvs_t *gnvs) { struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT; + cfg = config_of_path(SA_DEVFN_ROOT);
/* Clear out GNVS. */ memset(gnvs, 0, sizeof(*gnvs)); @@ -110,12 +110,6 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu();
- if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } - cfg = dev->chip_info; - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = cfg->dptf_enable;
@@ -158,7 +152,7 @@ void soc_fill_fadt(acpi_fadt_t *fadt) { const struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT; + cfg = config_of_path(SA_DEVFN_ROOT);
fadt->pm_tmr_blk = ACPI_BASE_ADDRESS + PM1_TMR;
@@ -174,13 +168,8 @@ fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.addrl = ACPI_BASE_ADDRESS + PM1_TMR;
- if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } - cfg = dev->chip_info;
- if(cfg->lpss_s0ix_enable) + if (cfg->lpss_s0ix_enable) fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0; }
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 1d5e6d9..3c4bf96 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -295,24 +295,18 @@ static void set_power_limits(void) { static struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT; msr_t rapl_msr_reg, limit; uint32_t power_unit; uint32_t tdp, min_power, max_power; uint32_t pl2_val;
+ cfg = config_of_path(SA_DEVFN_ROOT); + if (CONFIG(APL_SKIP_SET_POWER_LIMITS)) { printk(BIOS_INFO, "Skip the RAPL settings.\n"); return; }
- if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } - - cfg = dev->chip_info; - /* Get units */ rapl_msr_reg = rdmsr(MSR_PKG_POWER_SKU_UNIT); power_unit = 1 << (rapl_msr_reg.lo & 0xf); @@ -368,15 +362,9 @@ static void set_sci_irq(void) { static struct soc_intel_apollolake_config *cfg; - struct device *dev = SA_DEV_ROOT; uint32_t scis;
- if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } - - cfg = dev->chip_info; + cfg = config_of_path(SA_DEVFN_ROOT);
/* Change only if a device tree entry exists. */ if (cfg->sci_irq) { @@ -550,7 +538,7 @@
static void parse_devicetree(FSP_S_CONFIG *silconfig) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
if (!dev) { printk(BIOS_ERR, "Could not find root device\n"); @@ -679,21 +667,16 @@ { FSP_S_CONFIG *silconfig = &silupd->FspsConfig; static struct soc_intel_apollolake_config *cfg; + struct device *dev;
/* Load VBT before devicetree-specific config. */ silconfig->GraphicsConfigPtr = (uintptr_t)vbt_get();
- struct device *dev = SA_DEV_ROOT; - - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } + dev = pcidev_path_on_root(SA_DEVFN_ROOT); + cfg = config_of(dev);
mainboard_devtree_update(dev);
- cfg = dev->chip_info; - /* Parse device tree and disable unused device*/ parse_devicetree(silconfig);
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index aad0f6b..625d956 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -295,14 +295,7 @@
int soc_fill_sgx_param(struct sgx_param *sgx_param) { - struct device *dev = SA_DEV_ROOT; - assert(dev != NULL); - config_t *conf = dev->chip_info; - - if (!conf) { - printk(BIOS_ERR, "Failed to get chip_info for SGX param\n"); - return -1; - } + config_t *conf = config_of_path(SA_DEVFN_ROOT);
sgx_param->enable = conf->sgx_enable; return 0; diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index 1bf3202..84b61da 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -148,13 +148,7 @@ { DEVTREE_CONST struct soc_intel_apollolake_config *config;
- /* Look up the device in devicetree */ - DEVTREE_CONST struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } - config = dev->chip_info; + config = config_of_path(SA_DEVFN_ROOT);
/* Assign to out variable */ *dw0 = config->gpe0_dw1; diff --git a/src/soc/intel/apollolake/pnpconfig.c b/src/soc/intel/apollolake/pnpconfig.c index f9d493e..0e9e931 100644 --- a/src/soc/intel/apollolake/pnpconfig.c +++ b/src/soc/intel/apollolake/pnpconfig.c @@ -37,8 +37,10 @@ int index; size_t arrsize; const struct pnpconfig *pnpconfigarr; - struct device *dev = SA_DEV_ROOT; - struct soc_intel_apollolake_config *config = dev->chip_info; + struct soc_intel_apollolake_config *config; + + config = config_of_path(SA_DEVFN_ROOT); + switch (config->pnp_settings) { case PNP_PERF: pnpconfigarr = perf; diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 72a566a..6d3b346 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -100,17 +100,8 @@ /* Thermal throttle activation offset */ static void configure_thermal_target(void) { - const struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); - if (!dev) { - printk(BIOS_ERR, "Could not find SOC devicetree config\n"); - return; - } - const config_t *conf = dev->chip_info; - if (!dev->chip_info) { - printk(BIOS_ERR, "Could not find chip info\n"); - return; - } msr_t msr; + const config_t *conf = config_of_path(SA_DEVFN_ROOT);
if (!conf->tcc_offset) return; diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 25867c5..705bc00 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -386,12 +386,12 @@
static void generate_C_state_entries(void) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; acpi_cstate_t map[3]; int *set; int i;
+ config_t *config = config_of_path(SA_DEVFN_ROOT); + if (config->s0ix_enable) set = cstate_set_s0ix; else diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index 5592538..af587ee 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -195,8 +195,7 @@
static void initialize_vr_config(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
printk(BIOS_DEBUG, "Initializing VR config.\n"); @@ -450,10 +449,10 @@
static void configure_thermal_target(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
+ /* Set TCC activation offset if supported */ msr = rdmsr(MSR_PLATFORM_INFO); if ((msr.lo & (1 << 30)) && conf->tcc_offset) { diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c index 5dd076f..98c3c4c 100644 --- a/src/soc/intel/broadwell/smmrelocate.c +++ b/src/soc/intel/broadwell/smmrelocate.c @@ -270,7 +270,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index dce98c4..89770c0 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -144,8 +144,9 @@ ARRAY_SIZE(cstate_set_non_s0ix))]; int *set; int i; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + + config_t *config = config_of_path(SA_DEVFN_ROOT); + int is_s0ix_enable = config->s0ix_enable;
if (is_s0ix_enable) { @@ -165,18 +166,18 @@
void soc_power_states_generation(int core_id, int cores_per_package) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *config = config_of_path(SA_DEVFN_ROOT); + + /* Generate P-state tables */ if (config->eist_enable) - /* Generate P-state tables */ generate_p_state_entries(core_id, cores_per_package); }
void soc_fill_fadt(acpi_fadt_t *fadt) { const uint16_t pmbase = ACPI_BASE_ADDRESS; - const struct device *dev = PCH_DEV_LPC; - const struct soc_intel_cannonlake_config *config = dev->chip_info; + const struct soc_intel_cannonlake_config *config; + config = config_of_path(PCH_DEVFN_LPC);
if (!config->PmTimerDisabled) { fadt->pm_tmr_blk = pmbase + PM1_TMR; @@ -200,8 +201,8 @@
void acpi_create_gnvs(struct global_nvs_t *gnvs) { - const struct device *dev = PCH_DEV_LPC; - const struct soc_intel_cannonlake_config *config = dev->chip_info; + const struct soc_intel_cannonlake_config *config; + config = config_of_path(PCH_DEVFN_LPC);
/* Set unknown wake source */ gnvs->pm1i = -1; diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index faddbd5..4e0dba5 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -170,12 +170,7 @@ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; - const struct device *dev; - dev = pcidev_on_root(SA_DEV_SLOT_ROOT, 0); - if (!dev || !dev->chip_info) - return; - - const config_t *config = dev->chip_info; + const config_t *config = config_of_path(SA_DEVFN_ROOT);
if (config->gpio_override_pm) memcpy(value, config->gpio_pm, sizeof(uint8_t) * diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index 7dae615..7eb413c 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -105,8 +105,8 @@ unsigned int power_unit; unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1; u8 power_limit_1_val; - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + + config_t *conf = config_of_path(SA_DEVFN_ROOT);
if (power_limit_1_time > ARRAY_SIZE(power_limit_time_sec_to_msr)) power_limit_1_time = 28; @@ -234,11 +234,10 @@
static void configure_isst(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
- if (conf && conf->speed_shift_enable) { + if (conf->speed_shift_enable) { /* * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP * is supported or not. coreboot needs to configure MSR 0x1AA @@ -260,12 +259,7 @@
static void configure_misc(void) { - struct device *dev = SA_DEV_ROOT; - if (!dev) { - printk(BIOS_ERR, "SA_DEV_ROOT device not found!\n"); - return; - } - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
msr = rdmsr(IA32_MISC_ENABLE); @@ -367,8 +361,7 @@
static void configure_thermal_target(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
/* Set TCC activation offset if supported */ diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 2367045..cbaa710 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -97,13 +97,7 @@
static void parse_devicetree(FSP_S_CONFIG *params) { - struct device *dev = SA_DEV_ROOT; - if (!dev) { - printk(BIOS_ERR, "Could not find root device\n"); - return; - } - - const config_t *config = dev->chip_info; + const config_t *config = config_of_path(SA_DEVFN_ROOT);
parse_devicetree_param(config, params); } @@ -147,8 +141,9 @@ int i; FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + struct device *dev; + + config_t *config = config_of_path(SA_DEVFN_ROOT);
/* Parse device tree and enable/disable devices */ parse_devicetree(params); diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c index 8eb81b0..8eadc8d 100644 --- a/src/soc/intel/cannonlake/pmc.c +++ b/src/soc/intel/cannonlake/pmc.c @@ -153,8 +153,7 @@
static void pmc_init(void *unused) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *config = config_of_path(SA_DEVFN_ROOT);
rtc_init();
diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c index 47efa18..2576c9c 100644 --- a/src/soc/intel/cannonlake/smmrelocate.c +++ b/src/soc/intel/cannonlake/smmrelocate.c @@ -256,7 +256,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
diff --git a/src/soc/intel/common/block/chip/chip.c b/src/soc/intel/common/block/chip/chip.c index eed1ada..9e74803 100644 --- a/src/soc/intel/common/block/chip/chip.c +++ b/src/soc/intel/common/block/chip/chip.c @@ -21,13 +21,8 @@ { const struct soc_intel_common_config *soc_config; const config_t *config; - int devfn = SA_DEVFN_ROOT; - const struct device *dev = pcidev_path_on_root(devfn);
- if (!dev || !dev->chip_info) - die("Could not find SA_DEV_ROOT devicetree config!\n"); - - config = dev->chip_info; + config = config_of_path(SA_DEVFN_ROOT); soc_config = &config->common_soc_config;
return soc_config; diff --git a/src/soc/intel/denverton_ns/memmap.c b/src/soc/intel/denverton_ns/memmap.c index 514d86d..2561922 100644 --- a/src/soc/intel/denverton_ns/memmap.c +++ b/src/soc/intel/denverton_ns/memmap.c @@ -30,7 +30,7 @@ #if defined(__SIMPLE_DEVICE__) pci_devfn_t dev = SA_DEV_ROOT; #else - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); #endif /* All regions concerned for have 1 MiB alignment. */ return ALIGN_DOWN(pci_read_config32(dev, reg), 1 * MiB); diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index ae7b344..c61d877 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -137,8 +137,9 @@ ARRAY_SIZE(cstate_set_non_s0ix))]; int *set; int i; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + + config_t *config = config_of_path(SA_DEVFN_ROOT); + int is_s0ix_enable = config->s0ix_enable;
if (is_s0ix_enable) { @@ -158,8 +159,8 @@
void soc_power_states_generation(int core_id, int cores_per_package) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *config = config_of_path(SA_DEVFN_ROOT); + if (config->eist_enable) /* Generate P-state tables */ generate_p_state_entries(core_id, cores_per_package); @@ -168,8 +169,8 @@ void soc_fill_fadt(acpi_fadt_t *fadt) { const uint16_t pmbase = ACPI_BASE_ADDRESS; - const struct device *dev = pcidev_on_root(0, 0); - const struct soc_intel_icelake_config *config = dev->chip_info; + + config_t *config = config_of_path(SA_DEVFN_ROOT);
if (!config->PmTimerDisabled) { fadt->pm_tmr_blk = pmbase + PM1_TMR; @@ -193,8 +194,7 @@
void acpi_create_gnvs(struct global_nvs_t *gnvs) { - const struct device *dev = pcidev_on_root(0, 0); - const struct soc_intel_icelake_config *config = dev->chip_info; + config_t *config = config_of_path(SA_DEVFN_ROOT);
/* Set unknown wake source */ gnvs->pm1i = -1; diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index ceef266..c4abb0c 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -107,12 +107,7 @@ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; - const struct device *dev; - dev = pcidev_on_root(SA_DEV_SLOT_ROOT, 0); - if (!dev || !dev->chip_info) - return; - - const config_t *config = dev->chip_info; + const config_t *config = config_of_path(SA_DEVFN_ROOT);
if (config->gpio_override_pm) memcpy(value, config->gpio_pm, sizeof(uint8_t) * diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c index 67d41d7..cf92cd9c 100644 --- a/src/soc/intel/icelake/cpu.c +++ b/src/soc/intel/icelake/cpu.c @@ -40,8 +40,7 @@
static void configure_isst(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
if (conf->speed_shift_enable) { @@ -66,10 +65,10 @@
static void configure_misc(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; msr_t msr;
+ config_t *conf = config_of_path(SA_DEVFN_ROOT); + msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= (1 << 0); /* Fast String enable */ msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index 382b184..ce162ef 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -29,13 +29,8 @@
static void parse_devicetree(FSP_S_CONFIG *params) { - struct device *dev = pcidev_on_root(0, 0); - if (!dev) { - printk(BIOS_ERR, "Could not find root device\n"); - return; - } - - const struct soc_intel_icelake_config *config = dev->chip_info; + const struct soc_intel_icelake_config *config; + config = config_of_path(SA_DEVFN_ROOT);
for (int i = 0; i < CONFIG_SOC_INTEL_I2C_DEV_MAX; i++) params->SerialIoI2cMode[i] = config->SerialIoI2cMode[i]; @@ -55,8 +50,10 @@ { int i; FSP_S_CONFIG *params = &supd->FspsConfig; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + + struct device *dev; + struct soc_intel_icelake_config *config; + config = config_of_path(SA_DEVFN_ROOT);
/* Parse device tree and enable/disable devices */ parse_devicetree(params); diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c index d98c83e..b1c66b9 100644 --- a/src/soc/intel/icelake/pmc.c +++ b/src/soc/intel/icelake/pmc.c @@ -135,8 +135,7 @@
static void pmc_init(void *unused) { - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *config = config_of_path(SA_DEVFN_ROOT);
rtc_init();
diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c index 4e2d684..926ef63 100644 --- a/src/soc/intel/icelake/smmrelocate.c +++ b/src/soc/intel/icelake/smmrelocate.c @@ -255,7 +255,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 910db97..869ca7f 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -174,8 +174,7 @@
static void acpi_create_gnvs(global_nvs_t *gnvs) { - const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct soc_intel_skylake_config *config = dev->chip_info; + const struct soc_intel_skylake_config *config = config_of_path(PCH_DEVFN_LPC);
/* Set unknown wake source */ gnvs->pm1i = -1; @@ -234,9 +233,8 @@
void acpi_fill_fadt(acpi_fadt_t *fadt) { - const struct device *dev = SA_DEV_ROOT; - const config_t *config = dev ? dev->chip_info : NULL; const uint16_t pmbase = ACPI_BASE_ADDRESS; + config_t *config = config_of_path(SA_DEVFN_ROOT);
/* Use ACPI 3.0 revision */ fadt->header.revision = get_acpi_table_revision(FADT); @@ -284,7 +282,7 @@ ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
- if (config && config->s0ix_enable) + if (config->s0ix_enable) fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0;
fadt->reset_reg.space_id = 1; @@ -506,8 +504,7 @@ int totalcores = dev_count_cpu(); int cores_per_package = get_cores_per_package(); int numcpus = totalcores/cores_per_package; - struct device *dev = SA_DEV_ROOT; - config_t *config = dev->chip_info; + config_t *config = config_of_path(SA_DEVFN_ROOT); int is_s0ix_enable = config->s0ix_enable; int max_c_state;
@@ -519,7 +516,7 @@ printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);
- if (config && config->eist_enable && config->speed_shift_enable) { + if (config->eist_enable && config->speed_shift_enable) { struct cppc_config cppc_config; cpu_init_cppc_config(&cppc_config, 2 /* version 2 */); acpigen_write_CPPC_package(&cppc_config); @@ -619,11 +616,11 @@ unsigned long current, struct acpi_rsdp *const rsdp) { - const struct soc_intel_skylake_config *const config = dev->chip_info; + const struct soc_intel_skylake_config *const config = config_of(dev); acpi_dmar_t *const dmar = (acpi_dmar_t *)current;
/* Create DMAR table only if we have VT-d capability. */ - if ((config && config->ignore_vtd) || !soc_is_vtd_capable()) + if (config->ignore_vtd || !soc_is_vtd_capable()) return current;
printk(BIOS_DEBUG, "ACPI: * DMAR\n"); @@ -695,8 +692,7 @@ /* Save wake source information for calculating ACPI _SWS values */ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) { - const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct soc_intel_skylake_config *config = dev->chip_info; + const struct soc_intel_skylake_config *config = config_of_path(PCH_DEVFN_LPC); struct chipset_power_state *ps; static uint32_t gpe0_sts[GPE0_REG_MAX]; uint32_t pm1_en; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index a1fced2..5b61df3 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -233,15 +233,11 @@ FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig; static struct soc_intel_skylake_config *config; + struct device *dev; uintptr_t vbt_data = (uintptr_t)vbt_get(); int i;
- struct device *dev = SA_DEV_ROOT; - if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); - return; - } - config = dev->chip_info; + config = config_of_path(SA_DEVFN_ROOT);
mainboard_silicon_init_params(params); /* Set PsysPmax if it is available from DT */ diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index df08959..5f4ce87 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -116,8 +116,8 @@ unsigned int power_unit; unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1; u8 power_limit_1_val; - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + + config_t *conf = config_of_path(SA_DEVFN_ROOT);
if (power_limit_1_time > ARRAY_SIZE(power_limit_time_sec_to_msr)) power_limit_1_time = 28; @@ -240,13 +240,13 @@
static void configure_thermal_target(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
+ /* Set TCC activation offset if supported */ msr = rdmsr(MSR_PLATFORM_INFO); - if ((msr.lo & (1 << 30)) && conf && conf->tcc_offset) { + if ((msr.lo & (1 << 30)) && conf->tcc_offset) { msr = rdmsr(MSR_TEMPERATURE_TARGET); msr.lo &= ~(0xf << 24); /* Bits 27:24 */ msr.lo |= (conf->tcc_offset & 0xf) << 24; @@ -260,10 +260,10 @@
static void configure_isst(void) { - struct device *dev = SA_DEV_ROOT; - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
+ if (conf->speed_shift_enable) { /* * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP @@ -286,21 +286,19 @@
static void configure_misc(void) { - struct device *dev = SA_DEV_ROOT; - if (!dev) { - printk(BIOS_ERR, "SA_DEV_ROOT device not found!\n"); - return; - } - config_t *conf = dev->chip_info; + config_t *conf = config_of_path(SA_DEVFN_ROOT); msr_t msr;
+ msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= (1 << 0); /* Fast String enable */ msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ + if (conf->eist_enable) msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ else msr.lo &= ~(1 << 16); /* Enhanced SpeedStep Disable */ + wrmsr(IA32_MISC_ENABLE, msr);
/* Disable Thermal interrupts */ @@ -558,19 +556,7 @@
int soc_fill_sgx_param(struct sgx_param *sgx_param) { - struct device *dev = SA_DEV_ROOT; - config_t *conf; - - if (!dev) { - printk(BIOS_ERR, "Failed to get root dev for checking SGX param\n"); - return -1; - } - - conf = dev->chip_info; - if (!conf) { - printk(BIOS_ERR, "Failed to get chip_info for SGX param\n"); - return -1; - } + config_t *conf = config_of_path(SA_DEVFN_ROOT);
sgx_param->enable = conf->sgx_enable; return 0; diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index 01def44..c382131 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -181,7 +181,7 @@
void pmc_soc_init(struct device *dev) { - const config_t *config = dev->chip_info; + const config_t *config = config_of(dev);
rtc_init();
@@ -233,12 +233,7 @@ */ static void pm1_handle_wake_pin(void *unused) { - struct device *dev = SA_DEV_ROOT; - - if (!dev || !dev->chip_info) - return; - - const config_t *conf = dev->chip_info; + const config_t *conf = config_of_path(SA_DEVFN_ROOT);
/* If WAKE# pin is enabled, bail out early. */ if (conf->deep_sx_config & DSX_EN_WAKE_PIN) diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c index 00f620f..9b7ea24 100644 --- a/src/soc/intel/skylake/romstage/systemagent.c +++ b/src/soc/intel/skylake/romstage/systemagent.c @@ -26,13 +26,11 @@
static void systemagent_vtd_init(void) { - const struct device *const root_dev = pcidev_path_on_root(SA_DEVFN_ROOT); const struct device *const igd_dev = pcidev_path_on_root(SA_DEVFN_IGD); const struct soc_intel_skylake_config *config = NULL;
- if (root_dev) - config = root_dev->chip_info; - if (config && config->ignore_vtd) + config = config_of_path(SA_DEVFN_ROOT); + if (config->ignore_vtd) return;
const bool vtd_capable = diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index 12ed26a..7286187 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -265,7 +265,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) { - struct device *dev = SA_DEV_ROOT; + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
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