Change in coreboot[master]: soc/intel/common: Include Elkhart Lake SA IDs

[Lean Sheng Tan (Code Review)]

Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

soc/intel/common: Include Elkhart Lake SA IDs

Add additional Elkhart Lake specific SA IDs

Signed-off-by: Lean Sheng Tan 
Change-Id: I41af9b17b8121f3b47f2242d9beeec297893b378
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
2 files changed, 22 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/40854/1

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index cfdcab3..060f303 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3526,6 +3526,17 @@
 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A10
 #define PCI_DEVICE_ID_INTEL_JSL_EHL		0x4532
 #define PCI_DEVICE_ID_INTEL_EHL_ID_1		0x4510
+#define PCI_DEVICE_ID_INTEL_EHL_ID_2		0x4522
+#define PCI_DEVICE_ID_INTEL_EHL_ID_3		0x4524
+#define PCI_DEVICE_ID_INTEL_EHL_ID_4		0x4512
+#define PCI_DEVICE_ID_INTEL_EHL_ID_5		0x4526
+#define PCI_DEVICE_ID_INTEL_EHL_ID_6		0x4514
+#define PCI_DEVICE_ID_INTEL_EHL_ID_7		0x4528
+#define PCI_DEVICE_ID_INTEL_EHL_ID_8		0x452A
+#define PCI_DEVICE_ID_INTEL_EHL_ID_9		0x4516
+#define PCI_DEVICE_ID_INTEL_EHL_ID_10		0x452C
+#define PCI_DEVICE_ID_INTEL_EHL_ID_11		0x452E
+#define PCI_DEVICE_ID_INTEL_EHL_ID_12		0x4518
 #define PCI_DEVICE_ID_INTEL_JSL_ID_1		0x4e22
 #define PCI_DEVICE_ID_INTEL_JSL_ID_2		0x4e26
 #define PCI_DEVICE_ID_INTEL_JSL_ID_3		0x4e12
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index d0e171d..5fa84b9 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -389,6 +389,17 @@
    PCI_DEVICE_ID_INTEL_TGL_ID_Y,
    PCI_DEVICE_ID_INTEL_JSL_EHL,
    PCI_DEVICE_ID_INTEL_EHL_ID_1,
+	PCI_DEVICE_ID_INTEL_EHL_ID_2,
+	PCI_DEVICE_ID_INTEL_EHL_ID_3,
+	PCI_DEVICE_ID_INTEL_EHL_ID_4,
+	PCI_DEVICE_ID_INTEL_EHL_ID_5,
+	PCI_DEVICE_ID_INTEL_EHL_ID_6,
+	PCI_DEVICE_ID_INTEL_EHL_ID_7,
+	PCI_DEVICE_ID_INTEL_EHL_ID_8,
+	PCI_DEVICE_ID_INTEL_EHL_ID_9,
+	PCI_DEVICE_ID_INTEL_EHL_ID_10,
+	PCI_DEVICE_ID_INTEL_EHL_ID_11,
+	PCI_DEVICE_ID_INTEL_EHL_ID_12,
    PCI_DEVICE_ID_INTEL_JSL_ID_1,
    PCI_DEVICE_ID_INTEL_JSL_ID_2,
    PCI_DEVICE_ID_INTEL_JSL_ID_3,

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40854/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/40854/1//COMMIT_MSG@9 
PS1, Line 9: Add additional Elkhart Lake specific SA IDs
Please add a dot/period at the end.

[Lean Sheng Tan (Code Review)]

Hello Praveen Hodagatta pranesh, build bot (Jenkins), Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Aamir Bohra, Werner Zeh, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40854

to look at the new patch set (#2).

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

soc/intel/common: Include Elkhart Lake SA IDs

Add additional Elkhart Lake specific SA IDs.

Signed-off-by: Lean Sheng Tan 
Change-Id: I41af9b17b8121f3b47f2242d9beeec297893b378
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
2 files changed, 22 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/40854/2

[Lean Sheng Tan (Code Review)]

Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40854/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/40854/1//COMMIT_MSG@9 
PS1, Line 9: Add additional Elkhart Lake specific SA IDs
> Please add a dot/period at the end.

Done

[Praveen Hodagatta pranesh (Code Review)]

Praveen Hodagatta pranesh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 2: Code-Review+1

[Werner Zeh (Code Review)]

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 2:

Any reason why you have not covered the CPU IDs in this patch as well?

[Lean Sheng Tan (Code Review)]

Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 2:
> Patch Set 2:
>
> Any reason why you have not covered the CPU IDs in this patch as well?

All CPI IDs have been covered in previous patch. This one extends the support to all SKUs.

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 3: Code-Review+2

[Werner Zeh (Code Review)]

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 3: Code-Review+2

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

Patch Set 3: Code-Review+2

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40854 )

Change subject: soc/intel/common: Include Elkhart Lake SA IDs
......................................................................

soc/intel/common: Include Elkhart Lake SA IDs

Add additional Elkhart Lake specific SA IDs.

Signed-off-by: Lean Sheng Tan 
Change-Id: I41af9b17b8121f3b47f2242d9beeec297893b378
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40854
Reviewed-by: Subrata Banik 
Reviewed-by: Werner Zeh 
Reviewed-by: Maulik V Vaghela 
Reviewed-by: Praveen HP 
Tested-by: build bot (Jenkins) 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
2 files changed, 22 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Werner Zeh: Looks good to me, approved
  Subrata Banik: Looks good to me, approved
  Maulik V Vaghela: Looks good to me, approved
  Praveen HP: Looks good to me, but someone else must approve

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index b1d3d3f..04f9d2d 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3714,6 +3714,17 @@
 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2	0x9A12
 #define PCI_DEVICE_ID_INTEL_JSL_EHL		0x4532
 #define PCI_DEVICE_ID_INTEL_EHL_ID_1		0x4510
+#define PCI_DEVICE_ID_INTEL_EHL_ID_2		0x4522
+#define PCI_DEVICE_ID_INTEL_EHL_ID_3		0x4524
+#define PCI_DEVICE_ID_INTEL_EHL_ID_4		0x4512
+#define PCI_DEVICE_ID_INTEL_EHL_ID_5		0x4526
+#define PCI_DEVICE_ID_INTEL_EHL_ID_6		0x4514
+#define PCI_DEVICE_ID_INTEL_EHL_ID_7		0x4528
+#define PCI_DEVICE_ID_INTEL_EHL_ID_8		0x452A
+#define PCI_DEVICE_ID_INTEL_EHL_ID_9		0x4516
+#define PCI_DEVICE_ID_INTEL_EHL_ID_10		0x452C
+#define PCI_DEVICE_ID_INTEL_EHL_ID_11		0x452E
+#define PCI_DEVICE_ID_INTEL_EHL_ID_12		0x4518
 #define PCI_DEVICE_ID_INTEL_JSL_ID_1		0x4e22
 #define PCI_DEVICE_ID_INTEL_JSL_ID_2		0x4e26
 #define PCI_DEVICE_ID_INTEL_JSL_ID_3		0x4e12
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 39ac53f..6fb7722 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -372,6 +372,17 @@
    PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2,
    PCI_DEVICE_ID_INTEL_JSL_EHL,
    PCI_DEVICE_ID_INTEL_EHL_ID_1,
+	PCI_DEVICE_ID_INTEL_EHL_ID_2,
+	PCI_DEVICE_ID_INTEL_EHL_ID_3,
+	PCI_DEVICE_ID_INTEL_EHL_ID_4,
+	PCI_DEVICE_ID_INTEL_EHL_ID_5,
+	PCI_DEVICE_ID_INTEL_EHL_ID_6,
+	PCI_DEVICE_ID_INTEL_EHL_ID_7,
+	PCI_DEVICE_ID_INTEL_EHL_ID_8,
+	PCI_DEVICE_ID_INTEL_EHL_ID_9,
+	PCI_DEVICE_ID_INTEL_EHL_ID_10,
+	PCI_DEVICE_ID_INTEL_EHL_ID_11,
+	PCI_DEVICE_ID_INTEL_EHL_ID_12,
    PCI_DEVICE_ID_INTEL_JSL_ID_1,
    PCI_DEVICE_ID_INTEL_JSL_ID_2,
    PCI_DEVICE_ID_INTEL_JSL_ID_3,