Change in coreboot[master]: soc/intel/alderlake: Add the CnviDdrRfimDisable configuration

[Ronak Kanabar (Code Review)]

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Rizwan Qureshi, Sumeet R Pawnikar, Subrata Banik, Sridhar Siricilla, Srinidhi N Kaushik, Patrick Rudolph.
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58132 )

Change subject: soc/intel/alderlake: Add the CnviDdrRfimDisable configuration
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Patch Set 6:

(2 comments)

File src/soc/intel/alderlake/chip.h:

https://review.coreboot.org/c/coreboot/+/58132/comment/c2ef6b7d_7d79130f 
PS6, Line 532: /* CNVi DDR RFIM Enable/Disable
             : 	 * Default 0. Setting this to 1 disables CNVi DDR RFIM.
             : 	 */
             : 	bool CnviDdrRfimDisable;
> I think we should invert the polarity of this, and have it be an `Enable` option

Right now it is by default enable from FSP. that's why i gave option to disable from devicetree if needed.

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/58132/comment/d23482b0_734a15cf 
PS6, Line 211: (config->CnviDdrRfimDisable)
> nit: parentheses not required

Ack