Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.
Nico Huber has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83538?usp=email )
Change subject: soc/intel/xeon_sp: Reserve MMIO high range ......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS2: I was referring to the bigger picture. FSP assigns resources, that's the big mistake. The details don't matter that much. What IMO matters is that "if Intel wants FSP to be responsible for something and that makes develo- per's work harder, they should at least have the decency to document what FSP does."
Another aspect is that, if other SoCs has similar needs of using MMIO high, maybe some common changes could be justified then?
To my knowledge Xeon-SP is the only platform in coreboot that hides resource assignments in FSP. How make common code if everything else is different? I don't see any other platform that needs this kind of special treatment.
The only effort that is justifiable IMO, is to adapt coreboot's resource allocation to the Xeon-SP needs (if that is necessary at all). Doing any resource assignments in FSP and any related effort is not justifiable to me. It's just endless overhead and burden. We could avoid a lot of redun- dant code, guessing and misunderstandings if FSP would not do what it shouldn't do. (I assume Intel had the same discussions for client platforms already, btw.)
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Nico Huber (Code Review)